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What the HetSC methodology
is?
The HetSC
methodology is a set of rules and guidelines which tells the user how
to build Heterogeneous specifications in SystemC.
By heterogeneous specifications here it is understood those
specifications able to integrate different Models of Computation (MoCs).
Where the HetSC
methodology is stated?
In the
HetSC documentation, which can be freely downloaded here.
What the HetSC
library is?
The HetSC
library is a methodological library which complements the SystemC™ core
reference library for system-level heterogeneous specification.
The HetSC library can be freely downloaded here.
Which are the
advantages of heterogeneous specification?
There are several
advantages associated with the support of heterogeneous specification.
They can be summarized in:
-
Specification more natural
and suited to the nature of the system described. Thus the
specification is done faster.
-
Simulation speed-up, since
the simulation kernel only need to dealt at a greater detail the
interesting aspects of the specification.
-
Fidelity, that is, a
higher protection against specification errors, which enables reaching
desired system features such as determinism, deadlock protection,
boundness, static scheduling, etc.
-
Improves the application
of a design flow. The design flow is more feasible since SW and HW
synthesis tools are more adapted to specific models of computation
dependending on the application field and discipline.
And the advantages of
HetSC?
As
well as the previosly enumerated advantages, it has to be taken into
account that:
-
this library is supported
only on top of the SystemC core library, which is compact and
efficient.
-
based on a standard (IEEE
1666 LRM) language, SystemC.
-
the methodology
is being integrated in the framework of a electronic system level (ESL)
design
methodology. This methodology is oriented to the platform-based HW/SW
co-design of embedded systems. Thus, HetSC does not restrict itself for
modeling.
-
enables the refinement
within the same language, SystemC. SystemC makes possible an important
improve of efficiency with a non-abrupt training effort, specially for
those designers already used to C or C++ modeling.
- TLM compatibility for
channels
which can present TLM interfaces. By default, HetSC channels use
SystemC core interfaces or, if not possible, HetSC specific interfaces.
Now, it is possible for some channels to use TLM interfaces. This makes
possible to integrate HetSC in flows where some kind of TLM
compatibility standard is beind adopted.
Development Platforms
The first
versions of the library are for Linux. platforms.
In Unix and Windows + Cygwin
they should work with minor editions.
Pre-requisites
The next
things have to be installed:
Find here
a compatibility list.
You do not need to install
other methodological libraries based on SystemC (such us SCV, TLM,
Perfidy, SC2RTOS, etc).
For
HetSC1.1 and HetSC1.0 versions, the installation of a patch for the
SystemC reference library is necessary. This patch corrects some
features of SystemC-2.1v1reference library, which provides a 100%
support of the whole set of checks for the Synchronous Reactive Model
of Computation (SR MoC). These patches also fix some bugs and provide
support for other features useful in SystemC for the verification of
the system through simulation. These patches can be downloaded here.
Future of the
library:  project.
The GIM group is
involved in ANDRES,
an IST project which will serve to improve the HetSC system-level
heterogeneous specification methodology and thus to mantain and enhace
the HetSC library, in several aspects:
-
to provide a formal framework for
the specification methodology.
-
extend the specification
methodology for supporting the specification of adaptivity.
-
connection with other SystemC-based
specification methodologies, like SystemC-AMS,
etc...
-
to enhace the set of
mechanisms and primitives for
modeling software.
-
to target platforms
presenting reconfigurable hardware.
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