Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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 IST 033511 ANDRES
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Title:IST 033511 ANDRES
Payer:FP6 IST CE 
Partners:OFFIS, Vienna University of Technology, KTH, Thales, DS2 
Budget:186300€ Years, begin:2006  end:2009 
Director:Eugenio Villar 
R&D Lines: Design and verification of HW/SW embedded systems
Staff: Eugenio Villar
Fernando Herrera
Sara Real
Description:ANDRES will develop an integrated modelling approach for heterogeneous embedded systems. This approach builds on the IEEE standard modelling language SystemC already adopted by many European companies. Next ANDRES will close the gaps in the tool flow for dynamically reconfigurable hardware by developing a tool to translate adaptive models onto RTL descriptions.

The prime result of ANDRES is a seamless design flow, which provides the possibility of designing embedded HW/SW systems on a higher level of abstraction emphasising in particular the application of run-time reconfigurable architectures.

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