Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Optimizations in max-log-map LLRe VLSI architecture
Type:International Conference
Where:IEEE International Symposium on Signals, Circuits and Systems (ISSCS). Iasi (Romania)
Date:2005-07
Authors: Jesús Miguel Pérez
Víctor Fernández
R&D Lines: Design and verification of electronic systems for communications
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