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Title: | RTOS modeling in SystemC for Real-Time embedded SW simulation: A POSIX model |
Type: | International Paper |
Where: | Design Automation for Embedded Systems, V.10, N.4, Springer, pp.209-227 |
Date: | 2006-12 |
Authors: |
Héctor Posadas
Jesús Angel Adámez
Eugenio Villar
F. Escuder (DS2)
F. Blasco (DS2)
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R&D Lines: |
Design and verification of HW/SW embedded systems
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Projects: |
ITEA IP 03002 MERCED
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ISBN: | 0929-5585 |
PDF File: |
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Abstract: | In this paper, techniques are proposed to accurately model the detailed RTOS functionality on-top of the SystemC execution kernel. The model allows timed-simulation and refinement of the RT/E SW code in SystemC. The simulation technology has been applied to the development of a high-level, POSIX simulation library in SystemC. The library allows the designer a fast, sufficiently accurate, timed simulation of the application SW running on top of POSIX. As most current RTOSs support this standard, the library is portable to different development frameworks. The library provides the required infrastructure for a complete, multiprocessing, HW/SW co-simulation environment at different abstraction levels using SystemC.
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