Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Fault Evaluation of a Distributed Preamplifying Stage of a High-Speed Folded ADC
Type:International Conference
Where:XXV Conference on Design of Circuits and Integrated Systems, DCIS'10
Date:2010-11
Authors: Yolanda Lechuga
Román Mozuelos
Mar Martínez
Salvador Bracho
R&D Lines: Test methods of digital and mixed integrated circuits
Projects: Métodos de Test Funcionales y Estructurales: Aplicacion al Autotest de Ci...
ISBN:978-846937393-4
PDF File:
Abstract:This paper presents a fault evaluation of one of the
main building blocks of a high-speed folded and interpolated
ADC, the preamplifier that feeds the input of each sample and
hold module of a distributed S&H stage. First, the tolerance
ranges for the specifications of the preamplifier that ensure the
fulfillment of the overall ADC specifications have been obtained,
taking advantage of a high-level behavioral model, developed on
the MATLAB environment. Then, a catastrophic fault model has
been applied on a transistor level implementation of the ADC in
order to establish the values for the open, short and GOS
resistances of the model that actually degrade the ADC
performance. Finally, a structural Design-for-Test (DfT)
approach has been applied for the detection of these faults.
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