Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:High-level modeling and exploration of a powerline communication network based on System-on-Chip
Type:Book chapter
Where:C. Silvano, W. Fornaciari & E. Villar (Eds.): "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: the MULTICUBE Approach", Springer, New York, USA
Authors: M. Martínez
D. Ferrúz
Héctor Posadas
Eugenio Villar
R&D Lines: Design and verification of HW/SW embedded systems
Projects: FP7 216693 MULTICUBE
PDF File:
Abstract:This chapter focuses on the application of MULTICUBE methodology to
the design of a ITU G.hn compatible component for powerline communication. The starting point of the analysis is a high level SystemC-based virtual platform where we will study the effect of the variation of a pre-defined set of design parameters on a set of pre-defined metrics. This automatic analysis will drive the design choices in order to build an optimized industrial system.

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