Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:A Model-Driven Methodology for the Development of SystemC Executable Environments
Type:International Conference
Where:Proceedings of the 2012 Forum on Specification and Design Languages, FDL'2012, IEEE
Authors: Fernando Herrera
Pablo Peñil
Héctor Posadas
Eugenio Villar
R&D Lines: Design of HW/SW Embedded Systems
Projects: FP7 IP 247999 COMPLEX
PDF File:
Abstract:System-level design methodologies rely on high-level
modeling and analysis techniques. Model driven
development (MDD), component-based design (CBD) and
abstraction enable to tackle the modeling of complex
embedded systems. High-level dynamic estimation
techniques give a chance for enabling from those abstract
models fast performance assessment of the design
alternatives for such complex systems at an early design
space exploration (DSE) phase. In this context, finding
efficient design solutions heavily rely on a model of the
system environment able to reflect feasible and common use
cases. Moreover, such environment modeling also requires
the abstraction and automated design support enabled by
model driven design techniques for system modeling. This
papers presents a methodology which enables a
UML/MARTE methodology for the specification of the
verification environment at the same level of the system
model used for system-level design activities, and a
framework which automates the extraction of input stimuli in
SystemC, thus enabling building an standard and executable
verification environment.
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