Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Enhancing Analyzability and Time Predictability in UML/MARTE Component-based Application Models
Type:International Conference
Where:Forum on specification & Design Languages (FDL 2015)
Authors: Fernando Herrera
Pablo Peñil
Eugenio Villar
R&D Lines: Design of HW/SW Embedded Systems
Projects: FP7 611146 CONTREX
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Abstract:This work presents how to integrate in an
expressive, component-based application model captured in
UML/MARTE formally based models relying on the
Synchronous Dataflow Model-of-Computation. The application
modelling methodology is part of an UML/MARTE modelling
methodology supporting high-level synthesis and design space
exploration. The expressiveness of the application modelling
methodology facilitates to find and build an application model
fulfilling the intended semantics, but does not help to ensure at
least for some parts of the model a strict fulfilment of functional
and extra-functional requirements. This capability has become a
need in the context of modelling mixed-criticality applications.
This paper shows how expressive, component-based
UML/MARTE models can integrate parts with a sound formal
basis which facilitates the analysis of functional and extra-
functional properties of such parts. Specifically, the paper shows
a set of modelling patterns which can be translated into SDF
counterparts. The paper also reports an implementation which
enables a bi-direccional interoperability between the
UML/MARTE models abiding the patterns and the formally-
based ForSyDe methodology, which automates functional
validation and the link to automated analysis of functional and
extra-functional properties.
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