Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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   PUBLICATIONS in which "Javier Merino" participates ordered by date
International Conference H. Posadas, J. Merino, E. Villar
"Data flow analysis from UML/MARTE models based on binary traces"
DCIS 2020 (accepted). 2020-11
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International Paper E. Villar, J. Merino, H. Posadas, R. Henia (Thales TRT), L. Rioux (Thales TRT)
"Mega-Modeling of complex, distributed, heterogeneous CPS systems"
Microprocessors and Microsystems (accepted). 2020-08
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International Conference V. Muttillo, G. Valente, L. Pomante, H. Posadas, J. Merino, E. Villar
"Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow"
IEEE proc. of the 2020 Conference on Digital System Design, DSD 2020. 2020-08
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