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GIM>Research>project>HWSWCO... |
PROJECT: |
| HWSWCO |
Select this link to see PUBLICATIONS within this project |
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Title: | HWSWCO |
Acronym: | |
Payer: | ESA-ESTEC y GMV |
Partners: | UPM y GMV |
Budget: | 65099€ |
Years, begin: | 2009 |
end: | 2011 |
Director: | Eugenio Villar |
R&D Lines: |
Design and verification of HW/SW embedded systems
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Staff: |
Eugenio Villar
Roberto Varona
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Description: | Two are the main objectives of the project. On the one hand, the development and production of a HW/SW co-design framework extending the ASSERT process to incorporate HW/SW co-design. This requires the definition of a consistent methodology for the system HW/SW co-design phase ensuring consistency between HW and SW design and verification. A prototype version of the HW/SW co-design toolset strongly compatible with the ASSERT approach will be built. On the other hand, a case study will be defined in order to experiment and validate the HW/SW co-design framework developed. |
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