Microelectronics Engineering Group

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Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Efficient Implementation of Pattern Matching Recognition in Heterogeneus Architectures
Type:National Conference
Where:XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014
Date:2014-11
Authors: Javier González Bayón
Pablo Pedro Sánchez
Javier Barreda
R&D Lines: Design and verification of HW/SW embedded systems
Projects:
ISBN:
PDF File:see file
Abstract:Implementation of pattern recognition algorithms
is an important and complex task. These schemes usually
perform time and resource consuming operations as 2D FFT.
That is the reason why usually they are implemented in
heterogeneous platforms with at least one DSP that accelerates
the mathematical applications. Nevertheless, even using this
specific processor the execution time required can be excessive.
Therefore, an efficient use of all the processors available in the
platform is mandatory. This paper proposes an efficient
implementation of pattern recognition schemes in a
heterogeneous platform that includes an ARM processor and a
DSP.
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