| PUBLICATION |
| Full record |
|Title:||Dynamic Current Testing Strategies for S2I Algorithmic A/D Converters|
|Where:||XVIII Conference on Design of Circuits and Integrated Systems (DCIS2003). Ciudad Real (Spain)|
Test methods of digital and mixed integrated circuits
Técnicas de Test para Circuitos Mixtos, Analógicos-Digitales. Aplicación ...
|Abstract:||The different topologies of algorithmic switched-current cyclic or redundant signed-digit cyclic (RSD) ADCs, based on SI and S2I memory cells, are developed to achieve a higher level of analog performance and reduction of influence of the most common errors in the circuits.|
The fault coverage that can be obtained in these circuits, using a dynamic current sensor for testing, depends on the capability of propagation of the effects of the faults injected inside the circuit, and on the capacity for detection of the sensor monitoring the dynamic supply current of one of the cells making up the S2I algorithmic A/D converter.
This propagation capacity will be referred to as fault reflection and we will study two test strategies based on the analysis of the dynamic current consisting in: capturing and analyzing the dynamic current of one of the cells during the normal operation mode; or, monitoring this current during a specific test mode for which the switching of the converter clocks is modified.
Later, the simulation results obtained with the two test strategies are compared in terms of the degree of reflection and fault coverage, and conclusions are extracted.