Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Automatic Concurrency generation through Communication Data Splitting based on UML-MARTE Models
Type:International Conference
Where:XXVIII Conference on Design of Circuits and Integrated Systems, San Sebastian, Noviembre, 2013
Authors: Alejandro Nicolás
Héctor Posadas
Pablo Peñil
Eugenio Villar
R&D Lines: Design and verification of HW/SW embedded systems
Projects: FP7 288307 PHARAON
PDF File:see file
Abstract:With the increase in the number of processing elements integrated in HW platforms, the development of new solutions helping engineers to design concurrent applications is gaining greater interest. Code refinements required to parallelize sequential algorithms are usually
quite complex, and do not guarantee that the decisions taken will provide the expected performance result, requiring a costly and iterative design process. To solve this problem, this paper presents a methodology that enables designers to define and automatically create different concurrent architectures for the system, only modifying different parameters in the UML model. The main idea is to
automatically modify the communication between components, adding to the typical configurable options of performing synchronous, asynchronous or buffered calls the idea of enabling parallelization by dividing one service call into several concurrent calls, each one operating with part of the data. Examples of use of this idea with video applications are presented, demonstrating the performance
improvement obtained in the final system.
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