Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Integrated Framework for Reusable Multi-Level Embedded System Verification
Type:International Conference
Where:Work-in-Progress Session, DAC, San Francisco
Authors: Álvaro Díaz
Eugenio Villar
Pablo Pedro Sánchez
R&D Lines: Design and verification of HW/SW embedded systems
Projects: ECSEL 737494-2 MegaMart2
PDF File:see file
Abstract:Embedded software verification is a task that differs with the traditional procedures of software or hardware verification. This is a complex task that involves not only the functional verification of the embedded application, but also the validation of platform-dependent non-functional requirements such as power consumption and execution time. Therefore, classical software verification methodologies based-on unit test frameworks have to be complemented with other techniques based-on virtual platforms and on-board testing. The challenge is to reuse the test set during a verification process that involves different techniques and frameworks.
This work proposes an integrated framework that improves the verification of functional and non-functional requirements during the embedded software verification process from the first steps to the final on-board validation. It enables the reuse of the same test benches while reducing test effort and verification time.
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