Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Fidelity of native-based performance models for Design Space Exploration
Type:International Conference
Where:MiFi Workshop in DATE 2016 in http://www.date-conference.com/conference/workshop-w03
Date:2016-03
Authors: Fernando Herrera
Eugenio Villar
R&D Lines: Previous activities in HW/SW Embedded Systems Design
Projects: FP7 611146 CONTREX
ISBN:
PDF File:see file
Abstract:The utilisation of fast performance assessment technologies is crucial for bounding the cost of the design of efficient embedded systems. Accuracy is a prime concern, since performance models have to be sufficiently faithful to the actual implementations they reflect. In a design space exploration (DSE) context, sufficiently means that the performance models shall enable design decisions. In this context, this talk shows how native simulation, while providing a qualitative speed-up for DSE, can also preserve an accuracy (.e.g, <10% error vs binary translation in account of simulated instructions in bare processing modelling). This should provide the fidelity required for design space exploration in most scenarios. The generic ideas presented are supported by the experiments performed on top of an actual adaptation and extension of a native simulation tool called VIPPE, in order to enable time and energy estimation of specific target processors.
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