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Title:	Test Limit Evaluation for an ADC Structural Design-for-Test Approach by using a CAT Platform
Type:	International Conference
Where:	Proceedings of the Conference on Design of Circuits and Integrated Systems DCIS 2008, Grenoble (Francia)
Date:	2008-11
Authors:	Yolanda Lechuga Ahcène Bounceur Román Mozuelos Mar Martínez Salvador Bracho Salvador Mir
R&D Lines:	Test methods of digital and mixed integrated circuits
Projects:	Test Integrado de Convertidores de Señal de Alta Velocidad de Funcionamie... Métodos de Test Funcionales y Estructurales: Aplicacion al Autotest de Ci... Métodos de test para Convertidores ADC de Alta Velocidad
ISBN:	978-2-84813-1245
PDF File:
Abstract:	This paper presents a Design-for-Test method for folded and interpolated analog-to-digital converters. The test approach samples relative voltage deviations among internal circuit nodes. A fault simulation is used to establish the fault detection threshold of the BIST by using a CAT platform.


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