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| GIM>Research>Synthesis applicatio... |
| RESEARCH LINE: |
| | Synthesis application of VHDL |
| Select these links to see PROJECTS or PUBLICATIONS within this research line |
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| STAFF: |
Eugenio Villar (Responsible for this Research Line)
Miguel Angel Allende
Víctor Fernández
Pablo Pedro Sánchez
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| WORK FIELDS: |
Synthesis application of VHDL requires the definition of several syntactical restrictions and description styles. During the 90’s, the use of VHDL in RT synthesis was a very active, international research area. Our participation to the ESPRIT 8370 ESIP [PRO93] project allowed us an active contribution to this international effort [ViSa95][Vi95b][Vi95c][Vi95d][Vi95e][SEV96][EcVi96][ImVi96]. GIM participated as associate partner to TGI in a consortia constituted by companies like BULL, ICL, SIEMENS-NIXDORF, PHILIPS, ZUKEN-REDAC, THOMSON, ANACAD, SYNTHESIA and CNET. Some of the results were submitted to the IEEE as contributions to the VHDL synthesis standardization process [VBD94][Vi95a] and CENELEC TC117, the European electrical and electronic standardization body [ViDe94][ViAl95][Vi95f]. Eugenio Villar was National representative in CENELEC as well as in the equivalent international committee IEC TC93. This work was the basis of the IEEE 1076.6 standard which defines a Level-1 Synthesis subset.
The GIM held the Secretariat of the Spanish VHDL User’s Group [PRO92] until 1996. The Spanish VHDL User’s Group served as an active means for knowledge transfer and dissemination of VHDL through the frequent organization of seminars, meetings, courses, etc. [ViDe95][SaVi95][Vi96]. These activities had an important industrial participation. It is worth mentioning the publication of the first book of VHDL in Spanish. The book is intended to undergraduate courses in electronic design as well as design engineers in companies [TTOV98][ViSa98] |
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