Microelectronics Engineering Group

Microelectronics Engineering Group

Electronics Technology, Systems and Automation Engineering Department University of Cantabria
Home    Staff    Research    Teaching    Doctorate    Publications    Tools    versiķn en espaņol Wed 25-May-22 . 00:18



Web Map


Location

News

Santander Info

GIM>Research>Publications
   PUBLICATIONS in which "Pablo Peņil" participates ordered by research line
 
   Design and verification of electronic systems for communications
Report, Study or Opinion by order Artur Wegele, P. Peņil, E. Villar, Wolfgang Mueller, Da He, Fabian Mischkalla, et. al.
"Updated frameworks"
Deliverable D4.5 the FP7-216807 SATURN Project. 2010-12
To see full record


   Design and verification of HW/SW embedded systems
International Paper K. Grüttner, R. Görgen, S. Schreiner, F. Herrera, P. Peņil, J. Medina, E. Villar, et al.
"CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties"
Microprocessors and Microsystems, V.51, pp. 39-55, doi=10.1016/j.micpro.2017.03.012. 2017-06
To see full record

International Conference R. Gorgen, K. Gruttner, F. Herrera, P. Peņil, J. Medina, E. Villar, G. Palermo, W. Fornaciari, C. Brandolese, D. Gadioli, et. al.
"CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties "
19th Euromicro Conference on Digital System Design, DSD 2016, IEEE. 2016-09
To see full record
PDF File
International Conference P. Peņil, H. Posadas, Julio Medina, E. Villar
"UML-Based Single-Source Approach for Evaluation and optimization of Mixed-Critical Embedded Systems "
XXX Conference on Design of Circuits and Integrated Systems, DCIS 2015, IEEE. 2015-11
To see full record
PDF File
International Paper H. Posadas, P. Peņil, A. Nicolás, E. Villar
"Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics"
Journal of System Architecture, V.61, I.8, pp.341–360. 2015-09
To see full record

National Conference F. Herrera, P. Peņil, E. Villar
"UML/MARTE Modelling for Design Space Exploration of Mixed-Criticality Systems on top of Time-Predictable HW/SW Platforms"
Jornadas de Computaciķn Empotrada (JCE15). 2015-09
To see full record

International Conference P. Peņil, P. Sánchez, David de La Fuente, Jesús Barba, Juan Carlos Lķpez, Xerach Peņa
"Building a Dynamically Reconfigurable System Through a High-Level Development Flow"
Forum on specification & Design Languages (FDL 2015). 2015-09
To see full record

International Conference F. Herrera, P. Peņil, E. Villar
"A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems"
18th International Workshop on Software and Compilers for Embedded Systems, SCoPES 2015, ACM. 2015-06
To see full record
PDF File
International Paper H. Posadas, A. Nicolás, P. Peņil, E. Villar, Florian Broekaert, Michel Bourdelles, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Terechko, Miguel Glassee, Manuel Prieto
"Improving the Design Flow for Parallel and Heterogeneous Architectures running Real-Time applications: The PHARAON FP7 project"
Microprocessors and Microsystems,V.38, I.8, Part B, pp. 960–975. 2014-11
To see full record

International Conference A. Nicolás, P. Peņil, H. Posadas, E. Villar
"Automatic Deployment Of Component-Based Embedded Systems From UML/MARTE Models Using MCAPI"
XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014. 2014-11
To see full record
PDF File
International Paper H. Posadas, P. Peņil, A. Nicolás, E. Villar
"Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation"
Microelectronics Journal, V.45, I.10, pp.1281–1291, doi: 10.1016/j.mejo.2013.11.003. 2014-10
To see full record

International Conference A. Nicolás, P. Peņil, H. Posadas, E. Villar
"Automatic Synthesis over multiple APIs from UML/MARTE Models for easy Platform Mapping and Reuse"
Proceedings of the EuroMicro DSD Conference, IEEE, 2014. 2014-08
To see full record

Book chapter F. Herrera, P. Peņil, H. Posadas, E. Villar
"Model-Driven Methodology for the Development of Multi-level Executable Environments"
J. Haase (Ed.): "Models, Methods and Tools for Complex Chip Design", Lecture Notes in Electrical Engineering, V.265, Springer. 2014-01
To see full record

International Paper F. Herrera, H. Posadas, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV), G. Palermo
"The COMPLEX methodology for UML/MARTE modeling and design-space exploration of embedded systems"
Journal of Systems Architecture, V.60, N.1, Elsevier, pp.55–78. 2014-01
To see full record

International Conference E. Villar, A. Nicolás, P. Peņil, H. Posadas
"Modeling and SW Synthesis for Heterogeneous Embedded Systems in UML/MARTE"
Tutorial SD1: "High-Level Specifications to Cope With Design Complexity" in ASP-DAC 2014, Singapore . 2014-01
To see full record
PDF File
International Conference A. Nicolás, H. Posadas, P. Peņil, E. Villar
"Automatic Concurrency generation through Communication Data Splitting based on UML-MARTE Models"
XXVIII Conference on Design of Circuits and Integrated Systems, San Sebastian, Noviembre, 2013 . 2013-11
To see full record
PDF File
National Conference P. Peņil, H. Posadas, A. Nicolás, E. Villar, D. Calvo (TED)
"Code Synthesis of UML/MARTE models for physical platforms considering resource-specific codes"
IV Jornadas de Computaciķn Empotrada, Sarteco 2013. 2013-09
To see full record

International Conference P. Peņil, P. Sánchez, D. de la Fuente, J. Barba, J.C. Lķpez
"UML/MARTE methodology for automatic SystemC code generation of OPENMAX multimedia applications "
Euromicro Conference on Digital System Design, DSD 2013, IEEE. 2013-09
To see full record

International Conference H. Posadas, P. Peņil, A. Nicolás, E. Villar
"System synthesis from UML/MARTE models: The PHARAON approach"
Electronic System Level Synthesis Conference, ESLsyn, 2013, IEEE. 2013-05
To see full record

International Conference F. Herrera, H. Posadas, P. Peņil, E. Villar, P. Sánchez, P. González, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for the Specification and Performance Estimation of Embedded Systems"
Tutorial B: Advanced Techniques for Power-Aware System-Level Prototyping, DATE'13. 2013-03
To see full record

International Conference H. Posadas, P. Peņil, A. Nicolás, E. Villar
"Automatic synthesis of Embedded SW Communications from UML/MARTE models supporting memory-space separation"
XXVII Conference on Design of Circuits and Integrated Systems, DCIS'12. 2012-11
To see full record
PDF File
International Conference H. Posadas, P. Peņil, A. Nicolás, E. Villar
"UML/MARTE methodology for high-level system estimation and optimal synthesis"
MeCoES - Metamodeling and Code Generation for Embedded Systems, ESWeek 2012. 2012-10
To see full record
PDF File
International Conference F. Herrera, H. Posadas, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for Specification of Embedded Systems and Automatic Generation of Fast Configurable and Executable Performance Models"
ESWeek 2012 Compilation Proceedings, CoDes+ISSS’12, ACM. 2012-10
To see full record
PDF File
International Conference F. Herrera, H. Posadas, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The CompleX Eclipse Framework for UML/MATE Specification and design Space Exploration of Embedded Systems"
Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, DASIP 2012, IEEE. 2012-10
To see full record
PDF File
International Conference P. Peņil, H. Posadas, A. Nicolás, E. Villar
"Automatic synthesis from UML/MARTE models using channel semantics"
International Workshop on Model-Based Arquitecting and Construction of Embedded Systems, ACES-MB 2012, doi: 10.1145/2432631.2432640. 2012-09
To see full record
PDF File
International Conference Á. Díaz, P. Peņil, P. Sánchez, J. Sancho, J. Rico
"Modeling and Simulation of Secure Wireless Sensor networks"
Proceedings of the 2012 Forum on Specification and Design Languages, FDL'2012, IEEE. 2012-09
To see full record

Report, Study or Opinion by order F. Colas-Bigey, A. Terechko, H. Posadas, E. Villar, P. Peņil, F. Broekaert, C. Couvreur, M. Bourdelles, S. Li, L. Lavagno, A. Cohen
"Definition of tool interfaces and integrated design flow"
Deliverable D1.2 of the FP7 Pharaon Project. 2012-06
To see full record

Report, Study or Opinion by order H. Posadas, E. Villar, P. Peņil, F. Broekaert, C. Chantal, L. Lavagno, A. Terechko, M. Bourdelles, S. Li
"System specification methodology"
Deliverable D1.3 of the FP7 Pharaon Project. 2012-06
To see full record

Book chapter P. Peņil, F. Herrera, E. Villar
"Formal Support for Untimed MARTE-SystemC Interoperability"
T. Kazmierski & A. Morawiec (Eds.): "Systems Specification and Design Languages", Lecture Notes in Electrical Engineering, V.106, Springer. 2012-06
To see full record

International Conference F. Herrera, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The COMPLEX Eclipse framework for UML/MARTE Specification of Embedded Systems and automatic generation of executable models for Design-Space Exploration"
University Booth, DATE 12, Dresden. 2012-03
To see full record
PDF File
Book chapter P. Peņil, F. Herrera, E. Villar
"Formal Foundations for the Generation of Heterogeneous Executable Specifications in SystemC from UML/MARTE Models"
Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02
To see full record

International Conference P. Peņil, F. Herrera, E. Villar
"Towards SystemC Code Generation from UML/MARTE Concurrent System-Level Models "
W6: 2nd Workshop on Model Based Engineering for Embedded Systems Design, DATE 2011. 2011-03
To see full record
PDF File
Report, Study or Opinion by order Wolfgang Mueller, Da He, Fabian Mischkalla, P. Peņil, E. Villar
"The SATURN Methodology for the Co-Verification of Embedded Systems(Final Version)"
Deliverable D3.5 the FP7-216807 SATURN Project. 2010-12
To see full record

Report, Study or Opinion by order E. Villar, P. Peņil, et. al.
"Final Project Activity report and Project Management Report"
Deliverable D1.3 of the FP7-216807 SATURN Project. 2010-12
To see full record

Report, Study or Opinion by order Nikolaos Mitas, Dimitrios Kritharidis, Florent Azcarate, Manuel Carballeda, Philippe Hébrard, P. Peņil
"Test Cases Design Implementation and Evaluation (second increment)"
Deliverable D5.4 the FP7-216807 SATURN Project. 2010-12
To see full record

Report, Study or Opinion by order Adrian Larkham, P. Peņil, E. Villar, et. al.
"Final Plan for Use and Dissemination of Foreground"
Deliverable D6.5 the FP7-216807 SATURN Project. 2010-12
To see full record

Report, Study or Opinion by order Adrian Larkham, P. Peņil, E. Villar, et. al.
"Final Project Report"
Deliverable D1.4 the FP7-216807 SATURN Project. 2010-12
To see full record

International Conference P. Peņil, F. Herrera, E. Villar
"Formal Foundations for MARTE-SystemC Interoperability"
Forum on specification & Design Languages 2010, FDL'2010, IEEE. 2010-09
To see full record
PDF File
Report, Study or Opinion by order P. Peņil, E. Villar, Wolfgang Mueller, Da He, Fabian Mischkalla
"Code Generation and Heterogeneous Run-Time Environments for the Co-Verification of Embedded Systems (second increment)"
Deliverable D3.4 the FP7-216807 SATURN Project. 2010-09
To see full record

International Conference W. Mueller, D. He, F. Mischkalla, A. Wegele, P. Whiston, P. Peņil, E. Villar, N. Mitas, D. Kritharidis, F. Azcarate, M. Carballeda
"The SATURN Approach to SysML-Based HW/SW Codesign"
IEEE Annual Symposium on VLSI, ISVLSI'10. 2010-07
To see full record

Report, Study or Opinion by order M. Carballeda, N. Mitas, D. Kritharidis, F. Azcárate, P. Hebrard, E. Villar, P. Peņil
"Test Cases Specification (second increment)"
Deliverable D5.3 the FP7-216807 SATURN Project. 2010-04
To see full record

National Conference P. Peņil, H. Posadas, E. Villar
"Formal Modeling for UML/MARTE Concurrency Resources"
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems. 2010-03
To see full record
PDF File
Book chapter P. Peņil, J. Medina (CTR), H. Posadas, E. Villar
"Generating Heterogeneous Executable Specifications in SystemC from UML/MARTE Models"
in "Innovations in Systems and Software Engineering", V.6, N.1-2, March, Springer. 2009-12
To see full record

Report, Study or Opinion by order E. Villar, P. Peņil, et. al.
"Updated Plan for Use and Dissemination of Foreground"
Deliverable D6.4 the FP7-216807 SATURN Project. 2009-12
To see full record

Report, Study or Opinion by order E. Villar, P. Peņil, et. al.
"Second Project Activity Report and Project Management Report "
Deliverable D1.2 the FP7-216807 SATURN Project. 2009-12
To see full record

International Conference P. Peņil, E. Villar, H. Posadas, Julio Medina (CTR)
"Executable SystemC specification of the MARTE generic concurrent and communication resources under different Models of Computation"
Workshop on the Definition, evaluation, and exploitation of modelling and computing standards for Real-Time Embedded Systems, STANDRTS'09 Satellite Workshop of the the 21st EuroMicro Conference on Real-Time Systems, Dublin. 2009-06
To see full record

Report, Study or Opinion by order E. Villar, P. Peņil, et. al.
"Draft Roadmap Definition"
Deliverable D6.3 the FP7-216807 SATURN Project. 2009-04
To see full record

Report, Study or Opinion by order P. Peņil, E. Villar, et. al.
"Specification of a MDA-based framework with embedded systems verification support"
Deliverable D4.2 of the FP7-216807 SATURN Project. 2009-02
To see full record
PDF File
Report, Study or Opinion by order E. Villar, P. Peņil, et. al.
"Plan for Use and Dissemination of Foreground"
Deliverable D6.2 the FP7-216807 SATURN Project. 2008-08
To see full record


   Design of HW/SW Embedded Systems
International Conference F. Herrera, P. Peņil, E. Villar
"Enhancing Analyzability and Time Predictability in UML/MARTE Component-based Application Models"
Forum on specification & Design Languages (FDL 2015). 2015-09
To see full record

National Conference F. Herrera, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"An Embedded System Modelling Methodology for Design Space Exploration "
III Jornadas de Computaciķn Empotrada, Sarteco 2012. 2012-09
To see full record
PDF File
International Conference F. Herrera, P. Peņil, H. Posadas, E. Villar
"A Model-Driven Methodology for the Development of SystemC Executable Environments "
Proceedings of the 2012 Forum on Specification and Design Languages, FDL'2012, IEEE. 2012-09
To see full record

Report, Study or Opinion by order F. Herrera, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV), L. Lavagno (PoliTo), D. Quaglia (EdaLab)
"SystemC Generation Tools from MARTE and Stateflow"
Deliverable D2.1.2 of the COMPLEX project. 2011-06
To see full record

Report, Study or Opinion by order Emmanuel Vaumorin (Magillem), Bart Vanthournout (Synopsys), Sara Bocchio (ST-I), Davide Quaglia (EdaLab), F. Herrera, P. Peņil, E. Villar, Kai Hylla (OFFIS), Tiemo Fandrey (OFFIS)
"Preliminary report on virtual system generation"
Deliverable D2.5.1 of the COMPLEX project. 2011-06
To see full record


   Embedded Systems Specification
National Conference F. Herrera, P. Peņil, E. Villar
"UML/MARTE Modelling for Design Space Exploration of Mixed-Criticality Systems on top of Time-Predictable HW/SW Platforms"
Jornadas de Computaciķn Empotrada (JCE15). 2015-09
To see full record

National Conference F. Herrera, P. Peņil
"An Eclipse-based Framework for Modelling and Design Space Exploration of Embedded Systems: The COMPLEX approach "
2nd Spanish Eclipse Embedded's Day. 2011-10
To see full record

Report, Study or Opinion by order F. Herrera, P. Peņil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV), L. Lavagno (PoliTo), D. Quaglia (EdaLab)
"SystemC Generation Tools from MARTE and Stateflow"
Deliverable D2.1.2 of the COMPLEX project. 2011-06
To see full record

Report, Study or Opinion by order Emmanuel Vaumorin (Magillem), Bart Vanthournout (Synopsys), Sara Bocchio (ST-I), Davide Quaglia (EdaLab), F. Herrera, P. Peņil, E. Villar, Kai Hylla (OFFIS), Tiemo Fandrey (OFFIS)
"Preliminary report on virtual system generation"
Deliverable D2.5.1 of the COMPLEX project. 2011-06
To see full record


Š Copyright GIM (TEISA-UC)    ¤    All rights reserved.    ¤    Legal TermsE-Mail Webmaster