Grupo de Ingeniería Microelectrónica

Grupo de Ingeniería Microelectrónica

Departamento de Tecnología Electrónica, Ingeniería de Sistemas y Automática Universidad de Cantabria
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   PUBLICACIONES en las que participa: "Eugenio Villar" ordenadas por fecha
 
   2020
Conferencia Internacional H. Posadas, J. Merino, E. Villar
"Data flow analysis from UML/MARTE models based on binary traces"
DCIS 2020 (accepted). 2020-11
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Revista Internacional E. Villar, J. Merino, H. Posadas, R. Henia (Thales TRT), L. Rioux (Thales TRT)
"Mega-Modeling of complex, distributed, heterogeneous CPS systems"
Microprocessors and Microsystems (accepted). 2020-08
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Conferencia Internacional V. Muttillo, G. Valente, L. Pomante, H. Posadas, J. Merino, E. Villar
"Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow"
IEEE proc. of the 2020 Conference on Digital System Design, DSD 2020. 2020-08
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Conferencia Internacional M. Hussein, R. Nouacer, Y. Ouhammou, E. Villar, F. Corradi, C. Tieri, R. Castiñeira
"Key Enabling Technologies for Drones"
IEEE proc. of the 2020 Conference on Digital System Design, DSD 2020. 2020-08
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   2019
Conferencia Internacional E. Villar
"Megamodeling of complex, distributed, heterogeneous CPS systems"
Summer School on Cyber-Physical Systems and Internet-of-Things - CPS&IoT’2019, Budva, Montenegro, 2019. 2019-09
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   2018
Conferencia Internacional Á. Díaz, E. Villar, P. Sánchez
"Integrated Framework for Reusable Multi-Level Embedded System Verification"
Work-in-Progress Session, DAC, San Francisco. 2018-06
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Conferencia Internacional E. Villar
"Model-Driven Analysis of Security, Reliability, Test, Privacy, Safety and Trust of IoE Services "
Surrealist Workshop of the IEEE European Test Symposium, Bremen, Germany. 2018-05
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Conferencia Internacional E. Villar
"Model-Driven Analysis and Design of IoT Systems"
DATE Workshop W06: Embedded Software for Industrial IoTs, ESIIT 2018. 2018-03
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   2017
Conferencia Internacional Á. Díaz, E. Villar, Daniel Peña
"Short and Long Distance Marker Detection Technique in Outdoor and Indoor Environments for Embedded Systems"
XXXI Conference on Design of Circuits and Integrated Systems, DCIS 2017. 2017-11
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Capítulo de libro F. Herrera, J. Medina, E. Villar
"Modeling Hardware/Software Embedded Systems with UML/MARTE: A Single-Source Design approach"
in Soonhoi Ha and Jürgen Teich (Eds): "Handbook of Hardware/Software Codesign", Springer. 2017-09
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Conferencia Internacional H. Posadas, L. Diaz, E. Villar
"Static Write Buffer Cache Modeling to Increase Host-compiled Simulation Accuracy "
Euromicro Conference on Digital System Design (DSD). 2017-09
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Conferencia Internacional J. Medina (UC-ISTR), E. Villar
"Towards MARTE++: An Enhanced UML-based Language to Model and Analyse Real-Time and Embedded Systems for the IoT Age"
Forum on Specification and Design Languages, Verona, 2017. 2017-09
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Revista Internacional H. Hassan, L. T. Yang, J. Xue, E. Villar
"Special issue on: “Heterogeneous architectures for Cyber-physical systems (HACPS)”"
Microprocessors and Microsystems N.52, Elsevier, pp. 333–334. 2017-07
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Revista Internacional K. Grüttner, R. Görgen, S. Schreiner, F. Herrera, P. Peñil, J. Medina, E. Villar, et al.
"CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties"
Microprocessors and Microsystems, V.51, pp. 39-55, doi=10.1016/j.micpro.2017.03.012. 2017-06
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Capítulo de libro F. Mallet, E. Villar, F. Herrera
"MARTE for CPS and CPSoS"
in S. Nakajima, J.P. Talpin, M. Toyoshima and H. Yu (Eds.): "Cyber-Physical System Design from an Architecture Analysis Viewpoint: Communications of NII Shonan Meetings", Springer, pp.81-108, doi="10.1007/978-981-10-4436-6. 2017-05
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   2016
Capítulo de libro E. Villar, P. Martínez
"Positioning System for Recreated Reality Applications based on high performance Video-Processing"
in A. Molnos, C. Fabre (Eds.):"Model-Implementation Fidelity in Cyber Physical System Design", pp.201-230, Springer. 2016-12
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Revista Internacional H. Posadas, E. Villar
"Using Professional Resources for Teaching Embedded SW Development"
Revista Iberoamericana de Tecnologias del Aprendizaje, V. 11, I. 4, IEEE, pp. 248 – 255. 2016-11
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Conferencia Internacional R. Gorgen, K. Gruttner, F. Herrera, P. Peñil, J. Medina, E. Villar, G. Palermo, W. Fornaciari, C. Brandolese, D. Gadioli, et. al.
"CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties "
19th Euromicro Conference on Digital System Design, DSD 2016, IEEE. 2016-09
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Conferencia Internacional F. Herrera, E. Villar
"Fidelity of native-based performance models for Design Space Exploration"
MiFi Workshop in DATE 2016 in http://www.date-conference.com/conference/workshop-w03. 2016-03
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Conferencia Internacional F. Herrera, E. Villar
"CONTREP: A single-source framework for UML-based Modelling and Design of Mixed-Criticality Systems"
University Booth in DATE 2016. 2016-03
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   2015
Conferencia Internacional P. Peñil, H. Posadas, Julio Medina, E. Villar
"UML-Based Single-Source Approach for Evaluation and optimization of Mixed-Critical Embedded Systems "
XXX Conference on Design of Circuits and Integrated Systems, DCIS 2015, IEEE. 2015-11
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Patente Internacional E. Villar, P. Martínez, F. Alcalá, P. Sánchez, V. Fernández
"Método y sistema de localización espacial mediante marcadores luminosos para cualquier ambiente"
Oficina Española de Patentes y Marcas, OEPM. 2015-11
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Conferencia Internacional H. Posadas, E. Villar
"Using Professional Design Contests for the Development of Realistic Teaching Activities in Embedded Systems Design"
IEEE International Symposium on Computers in Education, SIIE. 2015-11
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Revista Internacional J. Wan, C-F. Lai, S. Mao, E. Villar
"J. Wan, C-F. Lai, S. Mao and E. Villar: "Editorial: Innovative circuit and system design methodologies for green cyber-physical systems”, "
Microprocessors and Microsystems, V.39, Elsevier, pp. 1231–1233. 2015-11
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Conferencia Internacional A. Quevedo, G. Callico, S. López, R. Sarmiento, A. Nicolás, P. Sánchez, E. Villar
"System Level Methodology based on VIPPE applied to the implementation of a Scalable Video Decoder on the ZynQ platform"
Conference on Design of Circuits and Integrated Systems, DCIS 2015. doi: 10.1109/DCIS.2015.7388604. 2015-11
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Revista Internacional H. Posadas, P. Peñil, A. Nicolás, E. Villar
"Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics"
Journal of System Architecture, V.61, I.8, pp.341–360. 2015-09
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Conferencia Nacional F. Herrera, P. Peñil, E. Villar
"UML/MARTE Modelling for Design Space Exploration of Mixed-Criticality Systems on top of Time-Predictable HW/SW Platforms"
Jornadas de Computación Empotrada (JCE15). 2015-09
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Conferencia Internacional F. Herrera, P. Peñil, E. Villar
"Enhancing Analyzability and Time Predictability in UML/MARTE Component-based Application Models"
Forum on specification & Design Languages (FDL 2015). 2015-09
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Conferencia Internacional F. Herrera, P. Peñil, E. Villar
"A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems"
18th International Workshop on Software and Compilers for Embedded Systems, SCoPES 2015, ACM. 2015-06
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Conferencia Internacional L. Diaz, E. González, E. Villar, P. Sánchez
"VIPPE: Parallel simulation and performance analysis of complex embedded systems"
HiPPES4CogApp: High Performance, Predictable Embedded Systems for Cognitive Application. 2015-01
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   2014
Revista Internacional H. Posadas, A. Nicolás, P. Peñil, E. Villar, Florian Broekaert, Michel Bourdelles, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Terechko, Miguel Glassee, Manuel Prieto
"Improving the Design Flow for Parallel and Heterogeneous Architectures running Real-Time applications: The PHARAON FP7 project"
Microprocessors and Microsystems,V.38, I.8, Part B, pp. 960–975. 2014-11
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Conferencia Internacional A. Nicolás, P. Peñil, H. Posadas, E. Villar
"Automatic Deployment Of Component-Based Embedded Systems From UML/MARTE Models Using MCAPI"
XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014. 2014-11
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Conferencia Internacional H. Posadas, F. Herrera, E. Villar
"Using JIGSAW-type collaborative learning for integrating foreign students in embedded system engineering"
Special session on Education, in the Conference on Design of Circuits and Integrated Circuits (DCIS). 2014-11
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Conferencia Internacional L. Diaz, E. González, E. Villar, P. Sánchez
"VIPPE, parallel simulation and performance analysis of multi-core embedded systems on multi-core platforms"
XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014. 2014-11
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Revista Internacional H. Posadas, P. Peñil, A. Nicolás, E. Villar
"Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation"
Microelectronics Journal, V.45, I.10, pp.1281–1291, doi: 10.1016/j.mejo.2013.11.003. 2014-10
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Conferencia Internacional L. Diaz, E. González, E. Villar, P. Sánchez
"VIPPE: Native simulation and performance analysis framework for multi-processing embedded systems"
Proceedings of the JCE-Sarteco 2014. 2014-09
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Conferencia Internacional A. Nicolás, P. Peñil, H. Posadas, E. Villar
"Automatic Synthesis over multiple APIs from UML/MARTE Models for easy Platform Mapping and Reuse"
Proceedings of the EuroMicro DSD Conference, IEEE, 2014. 2014-08
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Conferencia Internacional L. Lavagno (PoliTo), M. Lazarescu (PoliTo), H. Posadas, A. Nicolás, E. Villar
"Parallel and Heterogeneous Architectures for Real-Time Applications"
University Booth, DATE 14, Dresden. 2014-03
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Capítulo de libro F. Herrera, P. Peñil, H. Posadas, E. Villar
"Model-Driven Methodology for the Development of Multi-level Executable Environments"
J. Haase (Ed.): "Models, Methods and Tools for Complex Chip Design", Lecture Notes in Electrical Engineering, V.265, Springer. 2014-01
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Revista Internacional F. Herrera, H. Posadas, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV), G. Palermo
"The COMPLEX methodology for UML/MARTE modeling and design-space exploration of embedded systems"
Journal of Systems Architecture, V.60, N.1, Elsevier, pp.55–78. 2014-01
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Conferencia Internacional E. Ebeid (U.Ver.), F. Fummi (U.Ver.), D. Quaglia (U.Ver.), H. Posadas, E. Villar
"A Framework for Design-Space Exploration and Performance Analysis of Networked Embedded Systems"
Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, ACM. 2014-01
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Conferencia Internacional E. Villar, A. Nicolás, P. Peñil, H. Posadas
"Modeling and SW Synthesis for Heterogeneous Embedded Systems in UML/MARTE"
Tutorial SD1: "High-Level Specifications to Cope With Design Complexity" in ASP-DAC 2014, Singapore . 2014-01
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   2013
Conferencia Internacional A. Nicolás, H. Posadas, P. Peñil, E. Villar
"Automatic Concurrency generation through Communication Data Splitting based on UML-MARTE Models"
XXVIII Conference on Design of Circuits and Integrated Systems, San Sebastian, Noviembre, 2013 . 2013-11
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Revista Internacional K. Grüttner, P.A. Hartmann, K. Hylla, S. Rosinger, W. Nebel, F. Herrera, E. Villar, C. Brandolese, W. Fornaciari, G. Palermo, C. Ykman-Couvreur, D. Quaglia, F. Ferrero (GMV), R. Valencia (GMV)
"The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration"
Microprocessors and Microsystems, V.37, N.8-C, Elsevier, pp.966-80. 2013-11
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Conferencia Nacional P. Peñil, H. Posadas, A. Nicolás, E. Villar, D. Calvo (TED)
"Code Synthesis of UML/MARTE models for physical platforms considering resource-specific codes"
IV Jornadas de Computación Empotrada, Sarteco 2013. 2013-09
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Conferencia Internacional R. Fernández, H. Posadas, E. Villar
"Early performance evaluation of Multi-OS embedded platforms using native simulation"
Euromicro Conference on Digital System Design, DSD 2013, IEEE, doi: 10.1109/DSD.2013.131. 2013-09
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Conferencia Internacional H. Posadas, E. Villar, et al.
"EU FP7-288307 PHARAON project: Parallel and heterogeneous architecture for real-time applications"
Euromicro Conference on Digital System Design, DSD 2013, IEEE, doi: 10.1109/DSD.2013.47. 2013-09
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Conferencia Internacional H. Posadas, P. Peñil, A. Nicolás, E. Villar
"System synthesis from UML/MARTE models: The PHARAON approach"
Electronic System Level Synthesis Conference, ESLsyn, 2013, IEEE. 2013-05
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Conferencia Internacional F. Herrera, H. Posadas, P. Peñil, E. Villar, P. Sánchez, P. González, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for the Specification and Performance Estimation of Embedded Systems"
Tutorial B: Advanced Techniques for Power-Aware System-Level Prototyping, DATE'13. 2013-03
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Conferencia Internacional E. Villar, H. Posadas
"SW simulation technologies in virtual platforms"
Class 6: "Embedded SW Development on Virtual Platforms - Ready for Industrial Deployment?", Embedded World 2013, Nuremberg. 2013-02
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   2012
Conferencia Internacional H. Posadas, P. Peñil, A. Nicolás, E. Villar
"Automatic synthesis of Embedded SW Communications from UML/MARTE models supporting memory-space separation"
XXVII Conference on Design of Circuits and Integrated Systems, DCIS'12. 2012-11
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Revista Internacional F. Herrera, I. Ugarte, E. Villar
"Towards automated implementation of adaptive systems from abstract SystemC specifications"
Design Automation of Embedded Systems, Springer. 2012-11
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Revista Internacional R. Varona, E. Villar, A-I. Rodríguez (GMV), F. Ferrero (GMV), E. Alaña (GMV)
"Architectural Optimization & Design of Embedded Systems based on AADL Performance Analysis"
American Journal of Computer Architecture, V.1, N.2, Scientific & Academic Publishing. 2012-11
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Conferencia Internacional H. Posadas, P. Peñil, A. Nicolás, E. Villar
"UML/MARTE methodology for high-level system estimation and optimal synthesis"
MeCoES - Metamodeling and Code Generation for Embedded Systems, ESWeek 2012. 2012-10
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Conferencia Internacional F. Herrera, H. Posadas, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"A MDD Methodology for Specification of Embedded Systems and Automatic Generation of Fast Configurable and Executable Performance Models"
ESWeek 2012 Compilation Proceedings, CoDes+ISSS’12, ACM. 2012-10
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Conferencia Internacional F. Herrera, H. Posadas, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The CompleX Eclipse Framework for UML/MATE Specification and design Space Exploration of Embedded Systems"
Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, DASIP 2012, IEEE. 2012-10
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Conferencia Internacional H. Posadas, E. Villar
"Using Technical Documents as Support for Developing Competences in HW/SW Design"
IEEE International Symposium on Computers in Education, SIIE 2012. 2012-10
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Conferencia Internacional F. Herrera, H. Posadas, E. Villar, D. Calvo
"Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE"
15th Euromicro Conference on Digital System Design, DSD'2012. 2012-09
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Conferencia Internacional K. Gruttner, P.A. Hartmann, K. Hylla, S. Rosinger, W. Nebel, F. Herrera, E. Villar, C. Brandolese, W. Fornaciari, G. Palermo, C. Ykman-Couvreur, D. Quaglia, F. Ferrero, R. Valencia
"COMPLEX - COdesign and power Management in PLatform-based design space EXploration "
15th Euromicro Conference on Digital System Design, DSD'2012. 2012-09
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Conferencia Nacional F. Herrera, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"An Embedded System Modelling Methodology for Design Space Exploration "
III Jornadas de Computación Empotrada, Sarteco 2012. 2012-09
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Conferencia Internacional F. Herrera, P. Peñil, H. Posadas, E. Villar
"A Model-Driven Methodology for the Development of SystemC Executable Environments "
Proceedings of the 2012 Forum on Specification and Design Languages, FDL'2012, IEEE. 2012-09
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Conferencia Internacional P. Peñil, H. Posadas, A. Nicolás, E. Villar
"Automatic synthesis from UML/MARTE models using channel semantics"
International Workshop on Model-Based Arquitecting and Construction of Embedded Systems, ACES-MB 2012, doi: 10.1145/2432631.2432640. 2012-09
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Informe, Estudio o Dictamen por encargo F. Colas-Bigey, A. Terechko, H. Posadas, E. Villar, P. Peñil, F. Broekaert, C. Couvreur, M. Bourdelles, S. Li, L. Lavagno, A. Cohen
"Definition of tool interfaces and integrated design flow"
Deliverable D1.2 of the FP7 Pharaon Project. 2012-06
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Informe, Estudio o Dictamen por encargo H. Posadas, E. Villar, P. Peñil, F. Broekaert, C. Chantal, L. Lavagno, A. Terechko, M. Bourdelles, S. Li
"System specification methodology"
Deliverable D1.3 of the FP7 Pharaon Project. 2012-06
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Capítulo de libro P. Peñil, F. Herrera, E. Villar
"Formal Support for Untimed MARTE-SystemC Interoperability"
T. Kazmierski & A. Morawiec (Eds.): "Systems Specification and Design Languages", Lecture Notes in Electrical Engineering, V.106, Springer. 2012-06
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Conferencia Internacional F. Herrera, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV)
"The COMPLEX Eclipse framework for UML/MARTE Specification of Embedded Systems and automatic generation of executable models for Design-Space Exploration"
University Booth, DATE 12, Dresden. 2012-03
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Capítulo de libro P. Peñil, F. Herrera, E. Villar
"Formal Foundations for the Generation of Heterogeneous Executable Specifications in SystemC from UML/MARTE Models"
Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02
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Conferencia Internacional E. Villar, H. Posadas
"SW simulation technologies in virtual platforms"
Class 6: "Embedded SW Development on Virtual Platforms - Ready for Prime Time?", Embedded World 2012, Nuremberg. 2012-02
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Capítulo de libro H. Posadas, Á. Díaz, E. Villar
"SW Annotation Techniques and RTOS Modeling for Native Simulation of Heterogeneous Embedded Systems"
Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02
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   2011
Conferencia Internacional H. Posadas, E. Villar
"Automatic Communication Modeling for Early Exploration of HW/SW Allocation Based on Native Co-simulation"
XXVI Conference on Design of Circuits and Integrated Systems, DCIS'11. 2011-11
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Revista Internacional H. Posadas, E. Villar, Dominique Ragot, Marcos Martinez
"Early, time-approximate modeling of multi-OS linux platforms in a systemC co-simulation environment"
Int. Journal on Computer Systems Science & Engineering, Vol 26 No 6. 2011-11
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Libro completo C. Silvano, W. Fornaciari, E. Villar
"Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: the MULTICUBE Approach"
Springer, New York, USA . 2011-10
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Capítulo de libro C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martínez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, M. Wouters, C. Kavka, L. Onesti, A. Turco, U. Bondi, G. Mariani, H. Posadas, E. Villar, C. Wu, F. Dongrui, Z. Hao
"The MULTICUBE Design Flow"
C. Silvano, W. Fornaciari & E. Villar (Eds.): "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: the MULTICUBE Approach", Springer, New York, USA. 2011-10
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Capítulo de libro H. Posadas, S. Real, E. Villar
"M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration"
C. Silvano, W. Fornaciari & E. Villar (Eds.): "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: the MULTICUBE Approach", Springer, New York, USA. 2011-10
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Capítulo de libro M. Martínez, D. Ferrúz, H. Posadas, E. Villar
"High-level modeling and exploration of a powerline communication network based on System-on-Chip"
C. Silvano, W. Fornaciari & E. Villar (Eds.): "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: the MULTICUBE Approach", Springer, New York, USA. 2011-10
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Capítulo de libro C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, M. Wouters, C. Kavka, L. Onesti, A. Turco, U. Bondi, G. Mariani, H. Posadas, E. Villar, C. Wu, F. Dongrui, Z. Hao, T. Shibin
"MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures"
N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner (Eds.): "VLSI 2010 Annual Symposium Selected Papers", Lecture Notes in Electrical Engineering, V.57. 2011-10
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Capítulo de libro W. Mueller, D. He, F. Mischkalla, A. Wegele, A. Larkham, P. Whiston, P. Peñil, E. Villar, N. Mitas, D. Kritharidis, F. Azcarate, M. Carballeda
"The SATURN Approach to SysML-Based HW/SW Codesign"
N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner (Eds.): "VLSI 2010 Annual Symposium Selected Papers", Lecture Notes in Electrical Engineering, V.57, pp. 151-164, Springer. 2011-10
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Conferencia Internacional E. Villar, H. Posadas
"Native Power Estimation for Embedded System Design-Space Exploration"
PATMOS'11, Facultad de Informática, UCM, Madrid. 2011-09
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Conferencia Internacional F. Herrera, E. Villar
"A Framework for the Generation from UML/MARTE Models of IP/XACT HW Platform Descriptions for Multi-Level Performance Estimation "
Proceedings of the Forum of Design and Specification Languages 2011 (FDL'2011). 2011-09
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Conferencia Internacional F. Herrera, E. Villar, Philipp Harmann
"SystemC Refinement of Abstract Adaptive Processes for Implementation into Dynamically Reconfigurable Hardware "
Proceedings of the Forum of Design and Specification Languages 2011 (FDL'2011). 2011-09
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Informe, Estudio o Dictamen por encargo F. Herrera, P. Peñil, E. Villar, F. Ferrero (GMV), R. Valencia (GMV), L. Lavagno (PoliTo), D. Quaglia (EdaLab)
"SystemC Generation Tools from MARTE and Stateflow"
Deliverable D2.1.2 of the COMPLEX project. 2011-06
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Informe, Estudio o Dictamen por encargo Emmanuel Vaumorin (Magillem), Bart Vanthournout (Synopsys), Sara Bocchio (ST-I), Davide Quaglia (EdaLab), F. Herrera, P. Peñil, E. Villar, Kai Hylla (OFFIS), Tiemo Fandrey (OFFIS)
"Preliminary report on virtual system generation"
Deliverable D2.5.1 of the COMPLEX project. 2011-06
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Informe, Estudio o Dictamen por encargo Carlo Brandolese (PoliMi), Gianluca Palermo (PoliMi), William Fornaciari (PoliMi), F. Herrera, H. Posadas, E. Villar, Massimo Poncino (PoliTo), Chantal Ykman-Couvreur (IMEC)
"Preliminary report on design space exploration"
Deliverable 3.4.1 of COMPLEX project. 2011-06
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Informe, Estudio o Dictamen por encargo R. Varona, V. Fernández, E. Villar
"HWSW Co-Design Survey"
Deliverable R1-2 of the ESTEC HW/SW Co-Design Project. 2011-05
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Conferencia Internacional P. Peñil, F. Herrera, E. Villar
"Towards SystemC Code Generation from UML/MARTE Concurrent System-Level Models "
W6: 2nd Workshop on Model Based Engineering for Embedded Systems Design, DATE 2011. 2011-03
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Conferencia Internacional F. Herrera, E. Villar
"Generation of Abstract IP/XACT Platform Descriptions from UML/MARTE for System-Level Performance Estimation "
W6: 2nd Workshop on Model Based Engineering for Embedded Systems Design, DATE 2011. 2011-03
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Conferencia Internacional D. Calvo, P. González, H. Posadas, P. Sánchez, E. Villar, Andrea Acquaviva, Enrico Macii, Claudio Parrella, Mateo Giaconia
"SCoPE: SystemC Cosimulation and Performance Estimation. Application to Power and Thermal-Aware Design"
University Booth, DATE 11, Grenoble. 2011-03
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Conferencia Internacional D. Calvo, P. Botella, H. Posadas, P. Sánchez, E. Villar
"Automatic Generation of HdS System Model for System Simulation using IP-XACT"
Workshop W7: Hardware Dependent Software Solutions for SoC Design, DATE 2011. 2011-03
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Conferencia Internacional R. Varona, E. Villar, A-I. Rodríguez (GMV)
"Ravenscar Computational Model compliant AADL Simulation on LEON2"
International Symposium on Information System and Software Engineering, ISSE 2011 . 2011-03
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Revista Internacional D. Calvo, P. González, L. Diaz, H. Posadas, P. Sánchez, E. Villar, Andrea Acquaviva, Enrico Macii
"A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design"
ASP Journal on Low-Power Electronics (JOLPE): Special Issue on Low Power Design and Verification Techniques . 2011-02
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Conferencia Internacional H. Posadas, L. Diaz, E. Villar
"Fast Data-Cache Modeling for Native Co-Simulation "
Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011-01
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   2010
Informe, Estudio o Dictamen por encargo Wolfgang Mueller, Da He, Fabian Mischkalla, P. Peñil, E. Villar
"The SATURN Methodology for the Co-Verification of Embedded Systems(Final Version)"
Deliverable D3.5 the FP7-216807 SATURN Project. 2010-12
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Informe, Estudio o Dictamen por encargo Artur Wegele, P. Peñil, E. Villar, Wolfgang Mueller, Da He, Fabian Mischkalla, et. al.
"Updated frameworks"
Deliverable D4.5 the FP7-216807 SATURN Project. 2010-12
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Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"Final Project Activity report and Project Management Report"
Deliverable D1.3 of the FP7-216807 SATURN Project. 2010-12
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Informe, Estudio o Dictamen por encargo Adrian Larkham, P. Peñil, E. Villar, et. al.
"Final Plan for Use and Dissemination of Foreground"
Deliverable D6.5 the FP7-216807 SATURN Project. 2010-12
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Informe, Estudio o Dictamen por encargo Adrian Larkham, P. Peñil, E. Villar, et. al.
"Final Project Report"
Deliverable D1.4 the FP7-216807 SATURN Project. 2010-12
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Informe, Estudio o Dictamen por encargo Francisco Ferrero (GMV), R. Valencia (GMV), F. Herrera, E. Villar, L. Lavagno, D. Quaglia
"System specification methodology using MARTE and Stateflow "
Deliverable D2.1.1 of the COMPLEX project.. 2010-12
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Informe, Estudio o Dictamen por encargo Carlo Brandolese (PoliMi), Gianluca Palermo (PoliMi), William Fornaciari (PoliMi), F. Herrera, E. Villar, Francisco Ferrero (GMV), Raúl Valencia (GMV), Bart Vanthournout (Synopsys)
"Preliminary report on Embedded Software Estimation and Model Generation "
Deliverable D2.2.1 of the COMPLEX project. 2010-12
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Informe, Estudio o Dictamen por encargo D. Calvo, H. Posadas, E. Villar, Francisco Alcalá, David Gutierrez
"Guidelines for System-level design, integration and optimization"
Deliverable DT4.3.6 of the Artemis Scalopes Project. 2010-12
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Conferencia Internacional H. Posadas, E. Villar
"Native Co-Simulation of TCP/IP-Based Embedded Systems in SystemC"
XXV Conference on Design of Circuits and Integrated Systems, DCIS'10. 2010-11
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Conferencia Internacional L. Diaz, H. Posadas, E. Villar
"Obtaining Memory Address Traces from Native Co-Simulation for Data Cache Modeling in SystemC"
XXV Conference on Design of Circuits and Integrated Systems, DCIS'10. 2010-11
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Informe, Estudio o Dictamen por encargo D. Calvo, P. Botella, L. Diaz, Saeid Azmoodeh, Francisco Barat, E. Villar, Philippe Millet
"Final report on CPD System component and model implementation"
Deliverable DT2.3.2 of the Artemis Scalopes project. 2010-11
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Informe, Estudio o Dictamen por encargo D. Calvo, E. Villar, Phillipe Millet, Francisco Barat, Saeid Azmoodeh, et all
"CPD Design Flow & Modeling Framework (Final version)"
Deliverable DT2.4.2 of the Artemis Scalopes project. 2010-10
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Patente Nacional H. Posadas, L. Diaz, E. Villar
"Método y sistema de modelado de memoria caché"
Oficina Española de Patentes y Marcas. OEPM. 2010-10
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Conferencia Internacional D. Calvo, E. Villar, A. Aquaviva, E. Macii
"An Approach For High-Level Thermal Modeling using Native Simulation"
EUROMICRO Conference on Digital Systems Design. 2010-09
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Conferencia Internacional P. Peñil, F. Herrera, E. Villar
"Formal Foundations for MARTE-SystemC Interoperability"
Forum on specification & Design Languages 2010, FDL'2010, IEEE. 2010-09
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Conferencia Internacional V. Fernández, F. Herrera, E. Villar
"Formal Support for Untimed SystemC specifications: Application to high-level synthesis"
Forum on specification & Design Languages 2010, FDL'2010, IEEE. 2010-09
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Informe, Estudio o Dictamen por encargo P. Peñil, E. Villar, Wolfgang Mueller, Da He, Fabian Mischkalla
"Code Generation and Heterogeneous Run-Time Environments for the Co-Verification of Embedded Systems (second increment)"
Deliverable D3.4 the FP7-216807 SATURN Project. 2010-09
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Conferencia Internacional S. Real, H. Posadas, E. Villar
"L2 Cache Modeling for Native Co-Simulation in SystemC"
Symposium of Industrial Embedded Systems (SIES 2010). 2010-07
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Conferencia Internacional W. Mueller, D. He, F. Mischkalla, A. Wegele, P. Whiston, P. Peñil, E. Villar, N. Mitas, D. Kritharidis, F. Azcarate, M. Carballeda
"The SATURN Approach to SysML-Based HW/SW Codesign"
IEEE Annual Symposium on VLSI, ISVLSI'10. 2010-07
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Conferencia Internacional C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, M. Wouters, C. Kavka, L. Onesti, A. Turco, U. Bondi, G. Mariani, H. Posadas, E. Villar, C. Wu, F. Dongrui, Z. Hao, T. Shibin
"Multi-Objective Design Space Exploration of Multi-Core Architectures"
IEEE Annual Symposium on VLSI, ISVLSI'10. 2010-07
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Conferencia Internacional E. Villar
"SW simulation and Performance Analysis in Multi-Processing Embedded Systems"
ARTEMIS Technology Conference, Budapest, Hungary. 2010-06
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Informe, Estudio o Dictamen por encargo D. Calvo, E. Villar, Phillipe Millet, Saeid Azmoodeh, Francisco Barat, et all
"CPD Design Flow & Modelling Framework"
Deliverable DT2.4.1 of the Artemis Scalopes project. 2010-06
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Conferencia Internacional H. Posadas, E. Villar, Dominique Ragot, M. Martínez (DS2)
"Early Modeling of Linux-based RTOS Platforms in a SystemC Time-Approximate Co-Simulation Environment"
IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC'10). 2010-05
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Conferencia Internacional J. Castillo, H. Posadas, E. Villar, M. Martínez (DS2)
"Fast Instruction Cache Modeling for Approximate Timed HW/SW Co-Simulation "
20th Great Lakes Symposium on VLSI (GLSVLSI'10), Providence, USA. 2010-05
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Conferencia Internacional E. Villar
"Formalization of the MARTE/SystemC interoperability for HW/SW co-design (Invited Speech)"
Artist MoBE-RTES Workshop, Carmona (Sevilla). 2010-05
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Informe, Estudio o Dictamen por encargo F. Broekaert, N. Ventroux, D. Calvo, Á. Díaz, E. Villar, F. Alcalá, D. Gutiérrez
"System-level performance simulation: User Manuals & Prototype tools"
Deliverable DT4.3.1a of the Artemis Scalopes project. 2010-05
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Informe, Estudio o Dictamen por encargo M. Carballeda, N. Mitas, D. Kritharidis, F. Azcárate, P. Hebrard, E. Villar, P. Peñil
"Test Cases Specification (second increment)"
Deliverable D5.3 the FP7-216807 SATURN Project. 2010-04
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Conferencia Internacional R. Varona, E. Villar
"AADS+: AADL simulation including the Behavioral Annex"
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems. 2010-03
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Conferencia Nacional P. Peñil, H. Posadas, E. Villar
"Formal Modeling for UML/MARTE Concurrency Resources"
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems. 2010-03
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Informe, Estudio o Dictamen por encargo D. Calvo, E. Villar, A. Aquaviva, F. Bruschi
"Final Report on Architecture Modeling"
Deliverable DT4.2.2 of the Artemis Scalopes project. 2010-03
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Conferencia Internacional H. Posadas, E. Villar
"Modeling Separate Memory Spaces in Native Co-­simulation with SystemC for Design Space Exploration "
2PARMA Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures . 2010-02
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Informe, Estudio o Dictamen por encargo E. Villar, D. Calvo, A. Aquaviva, F. Bruschi
"Preliminary Report on architecture modeling and tool prototyping"
Deliverable DT4.2.1 of the Artemis Scalopes project. 2010-02
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Informe, Estudio o Dictamen por encargo H. Posadas, S. Real, E. Villar
"Refined Performance and Power Estimation Prototype Tool"
Deliverable D2.1.2 of the FP7 216693 MULTICUBE Project. 2010-02
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   2009
Capítulo de libro P. Peñil, J. Medina (CTR), H. Posadas, E. Villar
"Generating Heterogeneous Executable Specifications in SystemC from UML/MARTE Models"
in "Innovations in Systems and Software Engineering", V.6, N.1-2, March, Springer. 2009-12
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Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"Updated Plan for Use and Dissemination of Foreground"
Deliverable D6.4 the FP7-216807 SATURN Project. 2009-12
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Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"Second Project Activity Report and Project Management Report "
Deliverable D1.2 the FP7-216807 SATURN Project. 2009-12
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Conferencia Internacional H. Posadas, G. de Miguel, E. Villar
"Automatic generation of modifiable platform models in SystemC for Automatic System Architecture Exploration "
XXIV Conference on Design of Circuits and Integrated Systems, DCIS 2009, Zaragoza, Spain. 2009-11
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Conferencia Internacional F. Pétrot (TIMA), E. Villar
"High Speed Multi-Processors System-On-Chip Simulation Platforms for Hardware Dependent Software Development"
1st SoftSoC Workshop, Grenoble. 2009-10
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Conferencia Internacional C. Fabre (CEA), E. Villar, E. Vaumorin (MDS)
"Hardware-defined Software: Concepts & Architecture"
1st SoftSoC Workshop, Grenoble. 2009-10
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Capítulo de libro H. Posadas, E. Villar
"Automatic HW/SW interface modeling for scratch-pad & memory mapped HW components in native source-code co-simulation (Best Paper Award)"
A. Rettberg, M. Zanella, M. Amann, M. Keckeiser & F. Rammig (Eds.): "Analysis, Architectures and Modelling of Embedded Systems", Springer, 2009. 2009-09
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Conferencia Internacional F. Herrera, E. Villar
"Local Application of Simulation Directed for Exhaustive Coverage of Schedulings in SystemC Specifications"
Proceedings of the Forum on specification and Design Languages, FDL'09, IEEE, 2009. 2009-09
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Capítulo de libro H. Posadas, J. Castillo, D. Quijano, V. Fernández, E. Villar, Marcos Martínez (DS2)
"SystemC Platform Modeling for Behavioral Simulation and Performance Estimation of Embedded Systems"
L. Gomes and J. M. Fernandes (Eds.): “Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation”, IGI Global. 2009-07
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Informe, Estudio o Dictamen por encargo R. Varona, E. Villar
"AADS User's Manual"
Deliverable 3.4.1 of the SPICES project. 2009-07
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Conferencia Internacional R. Varona, E. Villar
"AADL simulation and performance analysis in SystemC"
14th IEEE International Conference on Engineering of Complex Computer Systems, Postdam. 2009-06
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Conferencia Internacional P. Peñil, E. Villar, H. Posadas, Julio Medina (CTR)
"Executable SystemC specification of the MARTE generic concurrent and communication resources under different Models of Computation"
Workshop on the Definition, evaluation, and exploitation of modelling and computing standards for Real-Time Embedded Systems, STANDRTS'09 Satellite Workshop of the the 21st EuroMicro Conference on Real-Time Systems, Dublin. 2009-06
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Conferencia Internacional E. Villar
"SATURN presentation"
Workshop on the Definition, evaluation, and exploitation of modelling and computing Standards for Real-Time Embedded Systems, STANDRTS'09. Satellite Workshop of the the 21st EuroMicro Conference on Real-Time Systems, Dublín. 2009-06
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Informe, Estudio o Dictamen por encargo P. Peñil, E. Villar, et al.
"Code generation and co-verification of embedded systems with SystemC"
Deliverable D3.3 of the FP7-216807 SATURN Project. 2009-06
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Informe, Estudio o Dictamen por encargo R. Varona, E. Villar
"User Manual of AADS v.2.0"
Deliverable D3.4.1: "SystemC Generator-final release" of the SPICES project. 2009-05
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Conferencia Internacional R. Varona, E. Villar
"AADS: AADL simulation and performance analysis in SystemC"
Software demonstration at the DATE’09 University Booth, Nice, April, 2009. 2009-04
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Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"Draft Roadmap Definition"
Deliverable D6.3 the FP7-216807 SATURN Project. 2009-04
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Informe, Estudio o Dictamen por encargo P. Peñil, E. Villar, et. al.
"Specification of a MDA-based framework with embedded systems verification support"
Deliverable D4.2 of the FP7-216807 SATURN Project. 2009-02
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Informe, Estudio o Dictamen por encargo H. Posadas, G. de Miguel, E. Villar
"Initial Performance and Power Estimation Prototype Tool"
Deliverable D2.1.1 of the FP7 216693 MULTICUBE Project. 2009-02
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Informe, Estudio o Dictamen por encargo S. Real, F. Herrera, E. Villar
"Modelling of SW. Final library elements."
Deliverable D1.2b of the ANDRES project. 2009-01
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   2008
Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"First Project Activity Report and Project Management Report"
Deliverable D1.1 the FP7-216807 SATURN Project. 2008-12
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Conferencia Internacional F. Herrera, E. Villar, P. A. Hartmann
"Specification of HW/SW adaptive Embedded Systems in SystemC"
Proceedings of the Forum on specification and Design Languages, FDL'08, IEEE, 2008. 2008-09
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Capítulo de libro V. Fernández, E. Villar
"SystemC"
ARTIST Survey of Programming Languages. Alan Burns (Editor). 2008-08
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Informe, Estudio o Dictamen por encargo M. Díez, E. Villar, M. Martínez (DS2)
"HdS code generation tool development"
Deliverable DS2-T4.5-Q2-08 of the Medea+ 2A708 LoMoSa+ Project. 2008-08
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Informe, Estudio o Dictamen por encargo E. Villar, P. Peñil, et. al.
"Plan for Use and Dissemination of Foreground"
Deliverable D6.2 the FP7-216807 SATURN Project. 2008-08
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Informe, Estudio o Dictamen por encargo R. Varona, E. Villar
"User Manual of AADS"
Deliverable D3.4.1: "SystemC Generator-first release" of the SPICES project. 2008-07
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Informe, Estudio o Dictamen por encargo F.Oppenheimer, K.Gruettner, A. Jantsch, F. Colas-Bigey, J. Haase, M. Martinez, F. Herrera, E. Villar
"Intermediate Dissemination and Demonstration Plan"
Deliverable D4.1c of the ANDRES project. 2008-07
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Capítulo de libro F. Herrera, E. Villar, C.Grimm, M.Damm, J.Haase
"Heterogeneous Specification with HetSC and SystemC-AMS. Widening the support of MoCs in SystemC "
E. Villar (Ed.): "Embedded Systems Specification and Design Languages", The CHDL Series V.10, Springer, pp-107-121. 2008-06
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Informe, Estudio o Dictamen por encargo P. Peñil, E. Villar, et. al.
"State-of-Art Analysis for Embedded Systems design"
Deliverable D3.1 of the FP7-216807 SATURN Project. 2008-06
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Libro completo E. Villar
"Embedded Systems Specification and Design Languages: Selected contributions from FDL'07"
The CHDL Series V.10, Springer. 2008-06
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Informe, Estudio o Dictamen por encargo K.Gruettner, A. Herrholz, P. A. Hartmann, F. Herrera, E. Villar
"Interface Synthesis Concept"
Deliverable D2.3a of the ANDRES project. 2008-06
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Informe, Estudio o Dictamen por encargo P. Peñil, E. Villar, et. al.
"Baseline for MDA-based modeling and code generation"
Deliverable D4.1 of the FP7-216807 SATURN Project. 2008-06
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Revista Internacional J. Haase, M. Damm, C. Grimm, F. Herrera, E. Villar
"Bridging MoCs in SystemC Specifications of Heterogeneous Systems"
EURASIP Journal on Embedded Systems, Special Issue "C-Based Design of Heterogeneous Embedded Systems", Volume 2008 (2008), Article ID 738136, 16 pages. 2008-05
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Revista Internacional C. Grimm, A. Jantsch, S. Shukla, E. Villar
"Editorial: C-Based Design of Heterogeneous Embedded Systems"
EURASIP Journal on Embedded Systems, Special Issue "C-Based Design of Heterogeneous Embedded Systems", Volume 2008 (2008). 2008-05
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Informe, Estudio o Dictamen por encargo R. Varona, E. Villar
"AADS (AADL SystemC Simulator)"
Deliverable D3.4.1: "SystemC Generator-first release", del proyecto SPICES. 2008-04
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   2007
Conferencia Internacional J. Castillo, H. Posadas, E. Villar, Marcos Martínez (DS2)
"Energy Consumption Estimation Technique in Embedded Processors with Stable Power Consumption based on Source-Code Operator Energy Figures"
XXII Conference on Design of Circuits and Integrated Systems, DCIS'07 . 2007-11
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Conferencia Internacional J. Haase, M. Damm, C. Grimm, F. Herrera, E. Villar
"Using Converter Channels within a Top-Down Design Flow in SystemC"
The 15th Austrian Workhop on Microelectronics, Graz, Austria. 2007-10
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Conferencia Internacional F. Herrera, E. Villar, C. Grimm, M. Damm, J. Haase
"A general approach to the interoperability of HetSC and SystemC-AMS"
Proceedings of the Forum on Design Languages 2007, FDL'07. Barcelona. 2007-09
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Conferencia Internacional H. Posadas, D. Quijano, E. Villar, Marcos Martínez (DS2)
"Protocol Bus Modeling using inheritance with TLM2.0"
Proceedings of the Forum on Design Languages, FDL'07. Barcelona. 2007-09
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Conferencia Internacional E. Villar, E. de las Heras
"SystemC-AADL interoperability"
ECSI Industrial Workshop: “System Design in Avionics and Space Industry”, Barcelona. 2007-09
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Revista Internacional F. Herrera, E. Villar
"A Framework for Heterogeneous Specification and Design of Electronic Embedded Systems in SystemC"
ACM Transactions on Design Automation of Electronic Systems, Special Issue on Demonstrable Software Systems and Hardware Platforms, V.12, Issue 3, N.22. 2007-08
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Conferencia Internacional A.Herrholz, F. Oppenheimer, P.A.Hartmann, A.Schallenberg, W. Nebel, C.Grimm, M.Damm, J.Haase, F.Brame, F. Herrera, E. Villar, I.Sander, A.Jantsch, A.-M.Foulliart, M.Martínez
"The ANDRES project: Analysis and Design of Run-time REconfigurable, heterogeneous Systems"
17th International Conference on Field Programmable Logic and Applications. Amsterdam. 2007-08
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Informe, Estudio o Dictamen por encargo J. Castillo, H. Posadas, D. Quijano, P. Sánchez, E. Villar
"HdS modeling library"
DS2-T3.4-Q2/07 Deliverable of the Medea+ 2A708 LoMoSa+ Project. 2007-06
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Conferencia Internacional E. de las Heras, E. Villar
"Specification for SystemC-AADL interoperability"
IEEE Proceedings of the 5th International Workshop on Intelligent Solutions in Embedded Systems (WISES’07). 2007-06
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Informe, Estudio o Dictamen por encargo F. Herrera, E. Villar
"Modeling of Software. Initial Library elements"
Deliverable D1.2a of the IST 5-033511 ANDRES Project. 2007-06
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Conferencia Internacional E. Villar, H. Posadas, Marcos Martínez (DS2)
"Efficient HdS simulation for MpSoC with NoC"
MEDEA+ Design Automation Conference, Grenoble. 2007-05
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Conferencia Internacional A. Herrholz, F. Oppenheimer, A. Schallenberg, W. Nebel, C. Grimm, M. Damm, F. Herrera, E. Villar, A-M. Fouilliart, M. Martínez
"ANDRES- ANalysis and Design of run-time REconfigurable, heterogeneous Systems"
Workshop on "Adaptive Heterogeneous Systems-On-Chip and European Dimensions" in the Design Automation and Test in Europe 2007, DATE'07. 2007-04
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Conferencia Internacional H. Posadas, D. Quijano, E. Villar, M. Martínez (DS2)
"SCoPE: SoC co-simulation and performance estimation in SystemC"
Software demonstration at the DATE’07 University Booth, Nice, April, 2007. 2007-04
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Informe, Estudio o Dictamen por encargo E. de las Heras, E. Villar
"UC Contribution to D2.1: Definition of Semantic for AADL"
Deriverable D2.1 of the SPICES project. 2007-02
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   2006
Revista Internacional H. Posadas, J. Adámez, E. Villar, F. Escuder (DS2), F. Blasco (DS2)
"RTOS modeling in SystemC for Real-Time embedded SW simulation: A POSIX model"
Design Automation for Embedded Systems, V.10, N.4, Springer, pp.209-227. 2006-12
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Conferencia Internacional H. Posadas, D. Quijano, E. Villar, F. Escuder (DS2), M. Martínez (DS2)
"TLM interrupt modelling for HW/SW co-simulation in SystemC"
XXI Conference on Design of Circuits and Integrated Systems, DCIS'06 . 2006-11
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Conferencia Internacional E. Villar, F. Herrera
"SystemC as an Heterogeneous System Specification Language"
ARTIST2 Workshop on Models of Computation and Communication (MoCC'06), ETH, Zurich. 2006-11
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Fichero PDF
Informe, Estudio o Dictamen por encargo F. Herrera, E. Villar, Cristoph Grimm (TUV), Ingo Sanders (KTH), Axel Jantsch (KTH)
"Methodology for Specification of Adaptivity"
Deliverable D1.1a of the IST 5-033511 ANDRES Project. 2006-11
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Conferencia Internacional F. Herrera, E. Villar
"Extension of the SystemC kernel for Simulation Coverage Improvement of System-Level Concurrent Specifications"
Proceedings of the Forum on Design Languages (FDL’06), Darmstadt, ECSI. 2006-09
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Conferencia Internacional F. Herrera, E. Villar
"A Framework for Embedded System Specification under Different Models of Computation in SystemC"
Proc. of DAC'06, ACM. 2006-07
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Capítulo de libro F. Herrera, E. Villar
"Mixing Synchronous Reactive and Untimed MoCs in SystemC"
"Applications of Specification and Design Languages for SoCs", A. Vachoux (Ed.), CHDL Series, Springer. 2006-07
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Informe, Estudio o Dictamen por encargo D. Quijano, H. Posadas, P. Sánchez, E. Villar, Marcos Martínez (DS2)
"Specification of HdS modeling methodology"
DS2-T3.4-Q2/06 Deliverable of the Medea+ 2A708 LoMoSa+ Project. 2006-06
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Informe, Estudio o Dictamen por encargo H. Posadas, J. Adámez, E. Villar, Emilio Arias (DS2)
"SystemC Execution Support Implementation"
D3.8.1 Deliverable of the ITEA IP 03002 Merced Project. 2006-06
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Conferencia Internacional H. Posadas, J. Adámez, P. Sánchez, E. Villar, Francisco Blasco (DS2)
"POSIX modeling in SystemC"
proc. of the 11th Asia and South Pacific Design Automation Conference, ASP-DAC'06, IEEE. 2006-01
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   2005
Informe, Estudio o Dictamen por encargo H. Posadas, J. Adámez, E. Villar
"SystemC Execution Support Implementation: First Draft"
Documento Entregable UC_T3.8_Q2/06. 2005-12
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Conferencia Internacional H. Posadas, E. Villar, Francisco Blasco
"Real-time Operating System modeling in SystemC for HW/SW co-simulation"
XX Conference on Design of Circuits and Integrated Systems, DCIS'05, IST Lisboa.. 2005-11
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Fichero PDF
Capítulo de libro F. Herrera, P. Sánchez, E. Villar
"Heterogeneous system-level specification in SystemC"
"Advances in Design and Specification Languages for SoC", P. Boulet (Ed.), CHDL Series, Springer. 2005-10
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Capítulo de libro E. Villar
"Introduction"
"Advances in Design and Specification Languages for SoC", P. Boulet (Ed.), CHDL Series, Springer. 2005-10
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Conferencia Internacional F. Herrera, E. Villar
"Mixing synchronous reactive and untimed models of computation in SystemC"
Proceedings of the Forum on Design Languages (FDL’05), Lausanne, ECSI. 2005-09
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Informe, Estudio o Dictamen por encargo H. Posadas, J. Adámez, E. Villar
"Requirements for a ‘trying’ environment in System context"
D2.5.1 Deliverable of the ITEA IP 03002 Merced Project. 2005-06
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   2004
Informe, Estudio o Dictamen por encargo H. Posadas, J. Adámez, E. Villar
"Requirements and definition of a common simulation environment: University of Cantabria contribution (First draft)"
Preliminar_DS2_D2.5.2. 2004-12
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Revista Internacional H. Posadas, F. Herrera, V. Fernández, P. Sánchez, E. Villar, F. Blasco
"Single Source Design Environment for Embedded Systems Based on SystemC"
Design Automation for Embedded Systems, V.9, N.4, Springer, pp.293-312. 2004-12
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Conferencia Internacional F. Herrera, P. Sánchez, E. Villar
"Heterogeneous system-level specification in SystemC"
Proceedings of the Forum on Design Languages (FDL’04), Lille, ECSI. 2004-09
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Capítulo de libro F. Herrera, P. Sánchez, E. Villar
"Modeling and design of CSP, KPN and SR systems in SystemC"
"Languages for System Specification", C. Grimm (Ed.), CHDL Series, Kluwer Academic Publisher. 2004-06
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Conferencia Internacional H. Posadas, F. Herrera, P. Sánchez, E. Villar, F. Blasco
"System-Level Performance Analysis in SystemC"
proc. of DATE'04, IEEE CS Press. 2004-02
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   2003
Conferencia Internacional E. Villar, P. Sánchez, F. Blasco, M. Radetzki, A. Vörg, Y. Wenhao
"Reusability of Microprocessor cores"
proc. of the MEDEA+ Design Automation Conference, Stuttgart. 2003-11
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Conferencia Internacional M. Bolado, J. Castillo, H. Posadas, P. Sánchez, E. Villar, C. Sanchez, F. Blasco, H. Fouren
"Using Open Source Cores in Real Applications"
XVIII Conference on Design of Circuits and Integrated Systems (DCIS2003). Ciudad Real (Spain). 2003-11
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Conferencia Internacional F. Herrera, P. Sánchez, E. Villar
"Modeling and design of CSP, KPN and SR systems in SystemC"
Proceedings of the Forum on Design Languages FDL'03, Frankfurt, ECSI. 2003-09
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Conferencia Internacional F. Herrera, H. Posadas, P. Sánchez, E. Villar
"Systematic Embedded Software Generation from SystemC"
proc. of DATE'03, IEEE CS Press. 2003-02
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Capítulo de libro F. Herrera, V. Fernández, P. Sánchez, E. Villar
"Embedded Software Generation from SystemC for Platform Based Design"
"SystemC Methodologies and Applications", Kluwer Academic Publishers. 2003-01
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Capítulo de libro F. Herrera, H. Posadas, P. Sánchez, E. Villar
"Systematic Embedded software generation from SystemC"
"Embedded Software for SoC", Kluwer Academic Publishers. 2003-01
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   2002
Revista Internacional E. Villar
"FDL 2002"
The ECSI Letter. 2002-12
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Informe, Estudio o Dictamen por encargo H. Posadas, F. Herrera, P. Sánchez, E. Villar
"Library for microprocessor core analysis"
UC-T1.3-Q4/02 Deliverable of the Medea+ A511 TOOLIP Project. 2002-12
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Conferencia Internacional Francisco Blasco, E. Villar, F. Herrera
"System-Level Dynamic Estimation of Time Performance for Codesign based on SystemC and HW/SW platform"
XVII Conference on Design of Circuits and Integrated Systems DCIS'02, Santander. 2002-11
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Conferencia Internacional E. Villar, Susana López, M. Bolado
"Design of first and second layers of a residential gateway ITD interface"
XVII Conference on Design of Circuits and Integrated Systems DCIS'02, Santander. 2002-11
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Informe, Estudio o Dictamen por encargo F. Herrera, H. Posadas, E. Villar
"Documento de requisitos técnicos de la biblioteca de perfilado"
UC/ToolIP/IR/03 Internal Report of the Medea+ A511 TOOLIP Project. 2002-11
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Conferencia Internacional F. Herrera, P. Sánchez, E. Villar
"HW/SW interface implementation from SystemC for platform-based design"
Forum on Design Languages FDL'02, ECSI. 2002-10
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Conferencia Internacional E. Villar, P. Sánchez, H. Posadas
"System-level reusability of microprocessor cores in a SystemC specification environment"
MEDEA+ Design Automation Conference. 2002-09
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Informe, Estudio o Dictamen por encargo F. Herrera, P. Sánchez, E. Villar
"Comparative study for the selection of the processor core for SystemC specification"
UC/ToolIP/IR/01 Internal Report of the Medea+ A511 TOOLIP Project. 2002-06
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Informe, Estudio o Dictamen por encargo F. Herrera, P. Sánchez, E. Villar
"First draft of the library for microprocessor core analysis"
UC/ToolIP/IR/02 Internal Report of the Medea+ A511 TOOLIP Project. 2002-06
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Capítulo de libro E. Villar
"A framework for specification and verification of timing constraints"
A. Mignotte, E. Villar & L. Horobin (Eds.): "System on Chip Design Languages: Best of FDL’01 & HDLCon’01", Kluwer Academic Publisher, pp.267-74. 2002-03
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Informe, Estudio o Dictamen por encargo I. Ugarte, P. Sánchez, E. Villar
"Metodología de Verificación y diseño para testabilidad digital"
Documento Entregable R3 del proyecto FEDER 1FD97-0791. 2002-03
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Informe, Estudio o Dictamen por encargo V. Fernández, F. Herrera, P. Sánchez, E. Villar
"Conclusiones: Metodología industrial de diseño de sistemas embebidos HW/SW"
Documento Entregable DF del proyecto FEDER 1FD97-0791. 2002-02
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   2001
Conferencia Internacional V. Fernández, E. Villar, F. Herrera
"System-Level Specification in SystemC of a Residential Gateway"
16th Design of Circuits and Integrated Systems Conference, DCIS 2001. Oporto (Portugal). 2001-11
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Conferencia Internacional F. Herrera, C. Camargo, E. Villar
"Embedded system design methodology based on SystemC"
Proc. of the Forum on Design Languages FDL01, Lyon, ECSI. 2001-09
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Libro completo E. Villar
"Design of HW/SW Embedded Systems"
Servicio de Publicaciones de la Universidad de Cantabria. 2001-07
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Capítulo de libro E. Villar
"HW/SW embedded system specification"
"Design of HW/SW Embedded Systems". (Ed. E. Villar). Servicio de Publicaciones de la Universidad de Cantabria. 2001-07
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Informe, Estudio o Dictamen por encargo V. Fernández, F. Herrera, E. Villar
"Especificación ejecutable del demostrador industrial"
Documento Entregable R2-C2 del proyecto FEDER 1FD97-0791. 2001-04
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   2000
Informe, Estudio o Dictamen por encargo F. Herrera, V. Fernández, R. Rodríguez, P. Sánchez, E. Villar
"Especificación del demostrador industrial"
Documento Entregable R2-C1 del proyecto FEDER 1FD97-0791. 2000-10
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Conferencia Nacional F. Herrera, R. Rodríguez, V. Fernández, E. Villar
"Desarrollo de Metodologías Industriales de Diseño de Sistemas Embebidos HW/SW"
I Seminario del Programa Nacional de Tecnologías de la Información y las Comunicaciones (TEDEA 2000). Almagro (Ciudad Real). 2000-09
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Revista Internacional G. Gorla, E. Moser, W. Nebel, E. Villar
"System Specification Experiments on a Common Benchmark"
IEEE Design & Test of Computers, Pág. 22-32. 2000-07
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Informe, Estudio o Dictamen por encargo R. Rodríguez, E. Villar
"Metodología de co-diseño"
Documento Entregable R1 del proyecto FEDER 1FD97-0791. 2000-06
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   1999
Informe, Estudio o Dictamen por encargo R. Rodríguez, E. Villar
"Contribución al Deliverable D.3.1.B: "Evaluation of co-simualtion of the space application""
Deliverable D.3.1.B of the ESPRIT 26971 CoMES project. 1999-12
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Conferencia Internacional F. Herrera, C. Sánz, I. Ugarte, E. Villar
"Specification Components: Reusability at the HW/SW system specification level"
proc. of the VHDL International Users Forum, IEEE CS. 1999-10
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Informe, Estudio o Dictamen por encargo R. Rodríguez, E. Villar
"Contribución al Deliverable D.2.2.B: "Architecture design and performance evaluation""
Deliverable D.2.2.B of the ESPRIT 26971 CoMES project. 1999-10
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Informe, Estudio o Dictamen por encargo R. Rodríguez, E. Villar
"Contribución al Deliverable D.3.1.A: "Specification of the case study detailed design""
Deliverable D.3.1.A of the ESPRIT 26971 CoMES project. 1999-09
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Conferencia Internacional B. Foucault, J.P. Calvez, X. Lobao, S. Olcóz, E. Villar
"CoMES: CoDesign Methodology for Embedded Systems"
proc. European Multimedia, Microprocessor Systems and Electronic Commerce Conference, EMMSEC'99, Stockholm, Sweden. 1999-06
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Informe, Estudio o Dictamen por encargo E. Villar
"Contribución al Deliverable D.2.2.A: "Functional design of the case study""
Deliverable D.2.2.A of the ESPRIT 26971 CoMES project. 1999-04
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Capítulo de libro E. Villar, A. López
"Especificación de sistemas embebidos"
Sistemas digitales: Elementos para un diseño de alto nivel. Ed. Ediciones Uniandes. 1999-02
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Conferencia Internacional E. Villar, D.B. de Vries and S. M. H. de Groot
"Functional design and Ada specification of the ATM sender for HW/SW co-design"
8th HCM BELSIGN Workshop. 1999-01
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Capítulo de libro A. López, M. Veiga, E. Villar
"Hardware/Software embedded system specification and design using Ada and VHDL"
Reliable Software Technologies-Ada-Europe'1999, Springer-Verlag.. 1999-01
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   1998
Conferencia Internacional A. Antón, E. Villar, D.B. de Vries & S.M. H. de Groot
"Design and functional description of a sender and receiver for ATM adaptation layer protocols"
XIII Design of Circuits and Integrated Systems Conference (DCIS98). Madrid. 1998-11
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Conferencia Internacional J.P. Deschamps, E. Villar
"Ada to VHDL translation in HW/SW co-design"
8th HCM BELSIGN Workshop. 1998-10
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Revista Internacional E. Villar
"Associate Centres: University of Cantabria, Faculty of Industrial and Telecommunication Engineering, Microelectronics Engineering Group"
ECSI Letter, Nº 15, pág. 3. 1998-04
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Libro completo Ll. Terés, Y. Torroja, S. Olcoz, E. Villar
"VHDL: Lenguaje estándar de Diseño Electrónico"
McGraw Hill. 1998-01
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Capítulo de libro E. Villar, P. Sánchez
"Síntesis"
VHDL: Lenguaje estándar de diseño electrónico McGraw-Hill. 1998-01
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Conferencia Internacional E. Villar, M. Veiga & M. G. Harbour
"Embedded system specification and design using Ada and VHDL"
First International Forum on Design Languages (FDL98). 1998-01
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Revista Internacional A. Antón, E. Villar, D.B. de Vries, S. M. H. de Groot.
"Flexible architecture for processing ATM adaptation layer protocols (AAL1-5)"
IEEE Journal of Electrical Engineering, V.49, N.3-4, pp. 70-75. 1998-01
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Revista Internacional P. Tabuenca, E. Villar
"An algorithm for clock cycle selection in behavioral synthesis"
Journal of Systems Architecture, V.44, N.9-10, North-Holland, pp. 773-786. 1998-01
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   1997
Conferencia Internacional A. López, M. Veiga, P. Sánchez, E. Villar
"ADA embedded system specification"
XII Design of Circuits and Integrated Systems Conference DCIS'97, Sevilla. 1997-11
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Conferencia Internacional A. Antón, E. Villar, D. B. de Vries, S.M. Heemstra de Groot
"Design and functional description of a receiver for ATM Adaptation Layer Protocols"
6th HCM BELDESIGN Workshop. Aveiro (Portugal). 1997-10
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Conferencia Internacional A. Antón, E. Villar, S.M. Heemstra de Groot, D. B. de Vries
"Flexible Architecture for Processing ATM Adaptation Layer Protocols (AAL1-5)"
First Electronic Circuits and Systems Conference (ECS97). Bratislava (Slovakia). 1997-09
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   1996
Conferencia Internacional H.W.A. Teunissen, D. B. de Vries, S.M. Heemstra de Groot, A. Antón, E. Villar
"Design of a Flexible Architecture for Processing ATM Adaptation Layer Protocols"
ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. Mierlo (The Netherlands). 1996-11
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Conferencia Internacional H.W.A. Teunissen, D. B. de Vries, S.M. Heemstra de Groot, A. Antón, E. Villar
"A Flexible Architecture for Processing ATM Adaptation Layer Protocols"
4th HCM BELSIGN Workshop, Santander. 1996-10
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Conferencia Internacional H.W.A. Teunissen, D. B. de Vries, S.M. Heemstra de Groot, A. Antón, E. Villar
"HW/SW Co-Design of the ATM AAL3-5 Protocols"
4th HCM BELSIGN Workshop, Santander. 1996-10
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Revista Internacional M. Imai, E. Villar
"ASPDAC 1995: HDL synthesizability and interoperability"
IEEE Design & Test of Computers. Panel Summaries, pp 3-4. 1996-04
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Revista Internacional W. Ecker, E. Villar
"VHDL multi-wait descriptions for synthesis"
Working Conference of VHDL Forum for CAD in Europe, Dresden Germany, pp 59-69. 1996-04
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Conferencia Internacional E. Villar
"VHDL in Spain"
VHDL International User´s Forum. Santa Clara, CA, USA. 1996-03
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Conferencia Internacional J. L. Barreda, P. Sánchez, E. Villar
"Current fault modeling in VITAL"
VHDL International User´s Forum. Santa Clara, CA, USA. 1996-02
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Revista Internacional P. Tabuenca, E. Villar, H. Veit, H.T. Vierhaus
"HS/SW co-design environment based on the CASTLE and FIRES tools: Use of C and VHDL as specification language"
SYDIS Publications 1993-1995, GMD. 1996-02
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Revista Internacional H.W.A. Teunissen, D.B. de Vries, S.M. Heemstra de Groot, A. Antón, E. Villar
"Design of a flexible architecture for processing ATM adaptation layer protocols"
CTIT Technical Report series, N. 96-40 University of Twente, The Netherlands. 1996-01
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Revista Internacional M. Selz, W. Ecker, E. Villar
"VHDL synthesis description portability: The need for Level-x synthesis subsets"
Journal of System Architecture 42, North-Holland, pp 105-116. 1996-01
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   1995
Revista Internacional E. Villar
"The Level-0 VHDL Synthesis Syntax and Semantics - 2nd Part"
The VHDL Newsletter, No. 20, pp.1 and 12. 1995-12
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Informe, Estudio o Dictamen por encargo E. Villar
"Level-0 VHDL synthesis syntax and semantics"
Technical report of the ESPRIT 8370 ESIP project. 1995-12
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Informe, Estudio o Dictamen por encargo E. Villar
"Level-0 VHDL synthesis syntax and semantics"
CENELEC TC117 ENV. 1995-12
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Conferencia Nacional I. González, E. Villar, S. Bracho
"Inserción automática de estructuras BIST en entornos de síntesis usando VHDL"
X Congreso de Diseño de Circuitos Integrados y Sistemas (DCIS95). Zaragoza. 1995-11
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Conferencia Nacional P. Tabuenca, E. Villar
"Entorno de co-diseño HW/SW basado en las herramientas CASTLE y FIRES: Uso de C y VHDL como lenguajes de especificación"
X Congreso de Diseño de Circuitos Integrados y Sistemas (DCIS95). Zaragoza. 1995-11
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Revista Internacional E. Villar
"The Level-0 VHDL Synthesis Syntax and Semantics - 1st Part"
The VHDL Newsletter, No. 19, pp. 10-11. 1995-10
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Informe, Estudio o Dictamen por encargo E. Villar
"Part of Standardization activities: The synthesis package", Part 1, Vol.I"
Deliverable 204 of the ESPRIT 8370 ESIP project. 1995-10
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Conferencia Internacional P. Tabuenca, E. Villar
"HW/SW co-design based on the CASTLE and FIRES tools: Methodology and application"
proc. of the 2nd HCM BELSIGN Workshop, Duisburg, Germany. 1995-09
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Conferencia Internacional V. Fernández, P. Sánchez, E. Villar
"A Novel High-Level Allocation Technique for Test"
Fourth Annual Atlantic Test Workshop. Corsica, France. 1995-07
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Conferencia Internacional E. Villar, P. Sánchez
"CAD tools for synthesis"
proc. of the IEEE International Synposium on Industrial Electronics, ISIE'95, Athens, Greece. 1995-07
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Revista Internacional E. Villar
"Objectives and activities of the European VHDL Synthesis Working Group (EVSWG)"
The VHDL Newsletter, N.18, pp.9-10.. 1995-06
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Conferencia Internacional V. Fernández, P. Sánchez, E. Villar
"Partial Scan High-Level Synthesis Strategy"
Second International Test Synthesis Workshop. Santa Barbara, CA (USA). 1995-05
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Conferencia Internacional J. L. Barreda, I. Hidalgo, V. Fernández, P. Sánchez, E. Villar
"Fault Modeling in VITAL"
Proceedings of the Workshop on Libraries, Component Modeling, and Quality Assurance. Nantes, France. 1995-04
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Conferencia Internacional M. Selz, W. Ecker, E. Villar
"VHDL synthesis description portability: The need for Level-x Synthesis Subsets"
Spring´95 Working Conference of the VHDL Forum for CAD in Europe. Nantes (France). 1995-04
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Informe, Estudio o Dictamen por encargo Pedro Tabuenca, E. Villar, L. Muñoz, R. Sanz
"Estudio de viabilidad de la implementación ASIC"
Documento Final del proyecto GAME "Análisis de viabilidad de un ASIC para chasis de baja". 1995-03
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Conferencia Internacional P. Tabuenca, E. Villar
"Integrating a design space exploration system for high-level synthesis into a HW/SW co-design environment"
1st HCM BELSIGN Workshop, Toledo, Spain. 1995-02
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Conferencia Nacional P. Sánchez, E. Villar
"Docencia del VHDL: Experiencia en la E.T.S.I. Industriales y de Telecomunicación de la Universidad de Cantabria"
Jornadas de Tecnología Electrónica JTEC95. Las Palmas. 1995-02
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Libro completo E. Villar, M. Altmäe
"Language requirements for high-level synthesis"
CENELEC TC117 report. 1995-01
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Revista Nacional C. Delgado Kloos, E. Villar
"VHDL: El lenguaje estándar de diseño electrónico"
Novática. 1995-01
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   1994
Informe, Estudio o Dictamen por encargo E. Villar, A. Debreil
"Synthesis and formal proof language support"
CENELEC TC117 report. 1994-09
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Informe, Estudio o Dictamen por encargo E. Villar, L. Berrojo, A. Debreil, B. Fjellborj, M. Mentes, C-W. Lee, N. Jansson
"Standardization activities: The synthesis package"
Deliverable 203 of the ESPRIT 8370 ESIP project. 1994-07
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Conferencia Internacional V. Fernández, P. Sánchez, Marta García, E. Villar
"Fault Modeling and Injection in VITAL Descriptions"
Proceedings of the Third Annual Atlantic Test Workshop, Nimes, France. 1994-06
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Conferencia Internacional V. Fernández, P. Sánchez, E. Villar
"High Level Synthesis Guided by Testability Measures"
First International Test Synthesis Workshop, Santa Barbara, CA (USA). 1994-05
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   1993
Conferencia Nacional V. Fernández, P. Sánchez, E. Villar
"Síntesis de alto nivel con criterios de testabilidad"
VIII Congreso de Diseño de Circuitos Integrados, Málaga. 1993-11
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Conferencia Internacional E. Villar, P. Sánchez, V. Fernández
"High Level Synthesis with Testability Criteria"
2nd IEEE Annual Atlantic Test Workshop, Hanover, USA. 1993-06
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